LV25700PM Datasheet, PDF (44/68 Pages) Sanyo Semicon Device – For Car Radio Single chip Tuner IC

SA5. FM RF 8bit DAC
D7
D6
RF_DAC7
RF_DAC6
D5
RF_DAC5
LV25700PM
D4
RF_DAC4
D3
RF_DAC3
D2
RF_DAC2
D1
RF_DAC1
D0
RF_DAC0
MSB
LSB
D7 D6 D5 D4 D3 D2 D1 D0
0
0
0
0
0
0
0
0 RF DAC = 0.3V (min)
0
0
0
0
0
0
0
1
-
-
-
-
-
-
-
-↓
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1 RF DAC = 7.1V (max)
SA6. FM ANT 8bit DAC (IRR_ADJ)
D7
D6
D5
ANT_DAC7
ANT_DAC6
ANT_DAC5
D4
ANT_DAC4
D3
ANT_DAC3
Function
D2
ANT_DAC2
D1
ANT_DAC1
D0
ANT_DAC0
MSB
LSB
D7 D6 D5 D4 D3 D2 D1 D0
0
0
0
0
0
0
0
0 ANT DAC = 0.3V (min)
0
0
0
0
0
0
0
1
↓
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1 ANT DAC = 7.1V (max)
Function
SA7. IF Count Time Setting & D0 Setting
D7
D6
D5
D4
D3
D2
D1
D0
UL/IFEND
BUSY
DZ1
DZ0
CTE
GT2
GT1
GT0
MSB
LSB
D7 D6 D5 D4 D3 D2 D1 D0
Function
0
0
0 IF count gate time = 0.878048msec
0
0
1 IF count gate time = 3.512195msec
0
1
0 IF count gate time = 7.024390msec
0
1
1 IF count gate time = 28.09756msec
1
0
0 IF count gate time = 56.195123msec
1
0
1 IF count gate time = 112.390244msec
0
Counter Reset
1
Count Start
0
0
DZC-A
0
1
DZC-B
1
0
DZC-C
1
1
DZC-D
0
0
0
1
1
0
Unlock detection: Unlock detection start = High, Lock = Low
BUSY signal: When the I²C slave address is received = High
Idling = Low
IF count end signal: When D7, D6=10: High, IF count end: Low
1
1
UL|BUSY signal: Logical OR of unlock detection signal and BUSY signal is output.
No.A1709-44/68