English
Language : 

LC87F1M16A Datasheet, PDF (4/32 Pages) Sanyo Semicon Device – 8-bit 1-chip Microcontroller with Full-Speed USB
LC87F1M16A
„Interrupts
• 35 sources, 10 vector addresses
(1) Provides three levels (low (L), high (H), and highest (X)) of multiplex interrupt control. Any interrupt requests
of the level equal to or lower than the current interrupt are not accepted.
(2) When interrupt requests to two or more vector addresses occur at the same time, the interrupt of the highest level
takes precedence over the other interrupts. For interrupts of the same level, the interrupt into the smallest vector
address takes precedence.
No.
Vector Address
Level
Interrupt Source
1
00003H
X or L
INT0
2
0000BH
X or L
INT1
3
00013H
H or L
INT2/T0L/INT4/USB bus active
4
0001BH
H or L
INT3/INT5/base timer
5
00023H
H or L
T0H/INT6
6
0002BH
H or L
T1L/T1H/INT7
SIO0/USB bus reset/USB suspend/UART1 receive complete/
7
00033H
H or L
SCUART receive complete
SIO1/USB endpoint/USB-SOF/SIO4/
8
0003BH
H or L
UART1 buffer empty/UART1 transmit complete/
SCUART buffer empty/SCUART transmit complete
9
00043H
H or L
ADC/T6/T7
10
0004BH
H or L
Port 0/PWM0/PWM1/T4/T5
• Priority levels X > H > L
• Of interrupts of the same level, the one with the smallest vector address takes precedence.
„Subroutine Stack Levels: 512 levels maximum (The stack is allocated in RAM.)
„High-speed Multiplication/Division Instructions
• 16 bits × 8 bits
( 5 tCYC execution time)
• 24 bits × 16 bits (12 tCYC execution time)
• 16 bits ÷ 8 bits
( 8 tCYC execution time)
• 24 bits ÷ 16 bits (12 tCYC execution time)
„Oscillation and PLL Circuits
• RC oscillation circuit (internal)
• Low-speed RC oscillation circuit (internal)
• CF oscillation circuit
• Crystal oscillation circuit
• PLL circuit (internal)
: For system clock (approx. 1MHz)
: For watchdog timer (approx. 30kHz)
: For system clock
: For system clock, time-of-day clock
: For USB interface (see Fig.5)
„Internal Reset Circuit
•Power-on reset (POR) function
(1) POR reset is generated only at power-on time.
(2) The POR release level can be selected from 4 levels (2.57V, 2.87V, 3.86V and 4.35V) through option
configuration.
•Low-voltage detection reset (LVD) function
(1) LVD and POR functions are combined to generate resets when power is turned on and when power voltage falls
below a certain level.
(2) The use/disuse of the LVD function and the voltage threshold level can be selected from 3 levels (2.81V, 3.79V
and 4.28V) through option configuration.
No.A1909-4/32