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LC78632RE Datasheet, PDF (4/9 Pages) Sanyo Semicon Device – Compact Disk Player DSP
LC78632RE
Continued from preceding page.
Parameter
Symbol
Conditions
High-level clock pulse width
tWH
SBCK, CQCK: Figures 1, 2, 3, and 4
Low-level clock pulse width
tWL
SBCK, CQCK: Figures 1, 2, 3, and 4
Data read access time
tRAC
SQOUT, PW: Figures 2, 3, and 4
Command transfer time
tRWC RWC: Figures 1 and 4
Subcode Q read enable time
tSQE
WRQ: Figure 2, with no RWC signal
Subcode read cycle
tSC
SFSY: Figure 3
Subcode read enable
tSE
SFSY: Figure 3
Port output delay time
tPD
CONT1, CONT2, P0 to P5: Figure 5
Input level
VEI
EFMI
VXI
XIN: Capacitance coupled input
Note: Due to the structure of this IC, the identical voltage must be applied to all power-supply pins.
min
400
400
0
1000
400
1.0
1.0
Electrical Characteristics at Ta = 25°C, VDD = 5 V, VSS = 0 V
Parameter
Current drain
Input high-level current
Input low-level current
Output high-level voltage
Output low-level voltage
Output off leakage current
Charge pump output current
Sled output voltage
Symbol
IDD
IIH1
IIH2
IIL
VOH1
VOH2
VOH3
VOH4
VOH5
VOL1
VOL2
VOL3
VOL4
VOL5
IOFF1
IOFF2
IPDOH
IPDOL
VSLD1
VSLD2
VSLD3
VSLD4
Conditions
Normal-speed playback
EFMI, HFL, TES, SBCK, RWC, COIN, CQCK, RES,
DEFI: VIN = 5 V
TAI, TEST1 to TEST5, CS: VIN = 5 V
TAI, EFMI, HFL, TES, SBCK, RWC, COIN, CQCK, RES,
TEST1 to TEST5, CS, DEFI: VIN = 0 V
EFMO, CLV+, CLV–, V/P, PCK, FSEQ, TOFF, TGL,
THLD, JP+, JP–, EMPH, EFLG, FSX
IOH = –1 mA
MUTEL, MUTER, LRCKO, DFLRO, DACKO, P0/DFCK,
P1/DFIN, P2, P3/DFLR, P4, P5, LRSY, CK2, ROMXA,
C2F, SBSY, PW, SFSY, WRQ, SQOUT, 16M, 4.2M,
CONT1, CONT2: IOH = –0.5 mA
VPDO: IOH = –1 mA
DOUT: IOH = –12 mA
LCHP, RCHP, LCHN, RCHN: IOH = –1 mA
EFMO, CLV+, CLV–, V/P, PCK, FSEQ, TOFF, TGL,
THLD, JP+, JP–, EMPH, EFLG, FSX
IOL = 1 mA
MUTEL, MUTER, LRCKO, DFLRO, DACKO, P0/DFCK,
P1/DFIN, P2, P3/DFLR, P4, P5, LRSY, CK2, ROMXA,
C2F, SBSY, PW, SFSY, WRQ, SQOUT, 16M, 4.2M,
CONT1, CONT2: IOL = 2 mA
VPDO: IOL = 1 mA
DOUT: IOL = 12 mA
LCHP, RCHP, LCHN, RCHN: IOL = 1 mA
PDO1, PDO2, VPDO, P0/DFCK, P1/DFIN,
P2, P3/DFLR, P4, P5: VOUT = 5 V
PDO1, PDO2, VPDO, P0/DFCK, P1/DFIN,
P2, P3/DFLR, P4, P5: VOUT = 0 V
PDO1, PDO2: RISET = 68 kΩ
PDO1, PDO2: RISET = 68 kΩ
min
25
–5
4
4
4.5
4.5
3.0
0.5
–5
–96
64
1.0
2.25
3.5
4.75
typ
11.2
136
typ
30
–80
80
1.25
2.5
3.75
max
400
1200
Unit
ns
ns
ns
ns
ms
µs
ns
ns
Vp-p
Vp-p
max
Unit
mA
5
µA
75
µA
µA
V
V
V
V
4.5
V
1
V
0.4
V
0.5
V
0.5
V
2.0
V
5
µA
µA
–64
µA
96
µA
1.5
V
2.75
V
4.0
V
V
No. 5826-4/9