LA9230M Datasheet, PDF (4/20 Pages) Sanyo Semicon Device – Analog Signal Processor ASP for CD players

LA9230M/9231M
Pin Function
Descriptions enclosed in brackets apply to the LA9231M only.
Pin
No.
Symbol
Contents
1 FIN2
Pickup photodiode connection pin. Added to FIN1 pin to generate the RF signal, subtracted from FIN1 pin to generate
the FE signal.
2 FIN1
Pickup photodiode connection pin.
3E
Pickup photodiode connection pin. Subtracted from F pin to generate the TE signal.
4F
Pickup photodiode connection pin.
5 TB
TE signal DC component input pin.
6 TE^−
Pin which connects the TE signal gain setting resistor between this pin and TE pin.
7 TE
TE signal output pin.
8 TESI
TES (Track Error Sense) comparator input pin. The TE signal is input through a bandpass filter.
9 SCI
Shock detection input pin.
10 TH
Tracking gain time constant setting pin.
11 TA
TA amplifier output pin.
12 TD^−
Pin for configuring the tracking phase compensation constant between the TD and VR pins.
13 TD
Tracking phase compensation setting pin.
14 JP
Tracking jump signal (kick pulse) amplitude setting pin.
15 TO
Tracking control signal output pin.
16 FD
Focusing control signal output pin.
17 FD^−
Pin for configuring the focusing phase compensation constant between the FD and FA pins.
18 FA
Pin for configuring the focusing phase compensation constant between the FD^− and FA^− pins.
19 FA^−
Pin for configuring the focusing phase compensation constant between the FA and FE pins.
20 FE
FE signal output pin.
21 FE^−
Pin which connects the FE signal gain setting resistor between this pin and FE pin.
22 AGND Analog signal GND.
23 SP
CV⁺ and CV^− pins input signal single-end output.
24 SPI
Spindle amplifier input.
25 SPG
12-cm spindle mode gain setting resistor connection pin.
26 SP^−
Spindle phase compensation constant connection pin, along with the SPD pin.
27 SPD
Spindle control signal output pin.
28 SLEQ Sled phase compensation constant connection pin.
29 SLD
Sled control signal output pin.
30 SL^−
Input pin for sled movement signal from microprocessor.
31 SL⁺
Input pin for sled movement signal from microprocessor.
32 JP^−
Input pin for tracking jump signal from DSP.
33 JP⁺
Input pin for tracking jump signal from DSP.
34 TGL
Input pin for tracking gain control signal from DSP. Gain is low when TGL is high.
35 TOFF Input pin for tracking off control signal from DSP. Tracking servo is off when TOFF is high.
36 TES
Output pin for TES signal to DSP.
37 HFL
The High Frequency Level is used to determine whether the main beam is positioned over a bit or over the mirrored
surface.
38 SLOF Sled servo off control input pin
39 CV^−
Input pin for CLV error signal from DSP.
40 CV⁺
Input pin for CLV error signal from DSP.
41 RFSM RF output pin.
42 RFS^−
RF gain setting and EFM signal 3T compensation constant setting pin, along with the RFSM pin.
43 SLC
Slice Level Control is an output pin that controls the data slice level used by the DSP for the RF waveform.
44 SLI
Input pin used by DSP for controlling the data slice level.
45 DGND Digital system GND pin.
NC
46
[FSC]
No connection
[Focus search smoothing capacitor output pin.]
47 NC
No connection
48 NC
No connection
49 DEF
Disc defect detection output pin.
50 CLK
Reference clock input pin. 4.23 MHz signal from the DSP is input.
51 CL
Microprocessor command clock input pin.
Continued on next page.
No.5189 - 4/20