LC78620E Datasheet, PDF (32/34 Pages) Sanyo Semicon Device – Compact Disc Player DSP

LC78620E
Continued from preceding page.
Blank entry: Illegal command, #: Changed or added command, *: latching commands (mode setting commands),
q: Commands shared with an ASP (LA9230M/31M or other processor), Items in parentheses are ASP commands
(provided for reference purposes)
1 0 0 0 0 0 0 0 * #ATT 0 dB SET
1 0 0 0 0 0 0 1 * #ATT DATA SET
1 0 1 0 0 0 0 0 * Old TRK JMP
1 0 1 0 0 0 0 1 * New TRK JMP
1 0 0 0 0 0 1 0 * #ATT 4STP UP 1 0 1 0 0 0 1 0 FOCS START #2
1 0 0 0 0 0 1 1 * #ATT 4STP DWN 1 0 1 0 0 0 1 1 * Internal BRKE
CONT
1 0 0 0 0 1 0 0 * #ATT 8STP UP 1 0 1 0 0 1 0 0
1 0 0 0 0 1 0 1 * #ATT 8STP DWN 1 0 1 0 0 1 0 1
1 0 0 0 0 1 1 0 * #ATT 16STP UP 1 0 1 0 0 1 1 0
1 0 0 0 0 1 1 1 * #ATT 16STP DWN 1 0 1 0 0 1 1 1
1 0 0 0 1 0 0 0 * CDROMXA
1 0 1 0 1 0 0 0 * DISC 8 SET
1 0 0 0 1 0 0 1 * ADDRESS “1”
1 0 1 0 1 0 0 1 * DISC 12 SET
1 0 0 0 1 0 1 0 * LASER OFF
10101010
1 0 0 0 1 0 1 1 * CONT, ROMXA
RST
1 0 0 0 1 1 0 0 TRACK JMP BRK
10101011
10101100
1 0 0 0 1 1 0 1 * OSC OFF
10101101
1 0 0 0 1 1 1 0 * OSC ON
10101110
1 0 0 0 1 1 1 1 * TRACKING ON 1 0 1 0 1 1 1 1
11000000
1 1 0 0 0 0 0 1 * Double-speed
playback
1 1 0 0 0 0 1 0 * Normal-speed
playback
11000011
11100000
11100001
11100010
11100011
1 1 0 0 0 1 0 0 * Internal BRK OFF 1 1 1 0 0 1 0 0
1 1 0 0 0 1 0 1 * Internal BRK ON 1 1 1 0 0 1 0 1
11000110
11100110
11000111
11100111
1 1 0 0 1 0 0 0 * Quad-speed
playback
11101000
1 1 0 0 1 0 0 1 * #CK2 polarity
inverted
11101001
1 1 0 0 1 0 1 0 * Internal BRK-DMC 1 1 1 0 1 0 1 0
low
1 1 0 0 1 0 1 1 * Internal BRK-DMC 1 1 1 0 1 0 1 1
high
1 1 0 0 1 1 0 0 * TOFF during
internal BRK
11101100
1 1 0 0 1 1 0 1 * TON during
internal BRK
11101101
1 1 0 0 1 1 1 0 * XTAL16M
1 1 1 0 1 1 1 0 * Command noise
OFF
1 1 0 0 1 1 1 1 * XTAL32M
1 1 1 0 1 1 1 1 * Command noise
ON
1 0 0 1 0 0 0 0 (* F.OFF.ADJ.ST) 1 0 1 1 0 0 0 0 * CLV-PH 1/1 mode 1 1 0 1 0 0 0 0
1 0 0 1 0 0 0 1 (* F.OFF.ADJ.OFF) 1 0 1 1 0 0 0 1 * CLV-PH 1/2 mode 1 1 0 1 0 0 0 1
1 0 0 1 0 0 1 0 (* T.OFF.ADJ.ST) 1 0 1 1 0 0 1 0 * CLV-PH 1/4 mode 1 1 0 1 0 0 1 0
1 0 0 1 0 0 1 1 (* T.OFF.ADJ.OFF) 1 0 1 1 0 0 1 1 * CLV-PH 1/8 mode 1 1 0 1 0 0 1 1
1 0 0 1 0 1 0 0 (* LSR.ON)
1 0 1 1 0 1 0 0 * CLV3ST output ON 1 1 0 1 0 1 0 0
1 0 0 1 0 1 0 1 (* LSR.OF/F.SV.ON) 1 0 1 1 0 1 0 1 * CLV3ST output
OFF
11010101
1 0 0 1 0 1 1 0 (* LSR.OF/F.SV.OF) 1 0 1 1 0 1 1 0 * JP3ST output ON 1 1 0 1 0 1 1 0
1 0 0 1 0 1 1 1 (* SP.8CM)
1 0 1 1 0 1 1 1 * JP3ST output OFF 1 1 0 1 0 1 1 1
1 0 0 1 1 0 0 0 (* SP.12CM)
10111000
11011000
1 0 0 1 1 0 0 1 (* SP.OFF)
1 0 0 1 1 0 1 0 (* SLED.ON)
1 0 0 1 1 0 1 1 (* SLED.OFF)
1 0 0 1 1 1 0 0 (* EF.BAL.START)
1 0 0 1 1 1 0 1 (* T.SERVO.OFF)
1 0 0 1 1 1 1 0 (* T.SERVO.ON)
10011111
10111001
10111010
10111011
10111100
10111101
10111110
10111111
11011001
11011010
11011011
11011100
11011101
11011110
11011111
1 1 1 1 0 0 0 0 * q TRCK CHECK
IN
(2BYTEDETECT)
11110001
11110010
11110011
11110100
11110101
11110110
11110111
1 1 1 1 1 0 0 0 * q TRCK CHECK
OUT
(2BYTE DETECT)
11111001
11111010
11111011
11111100
11111101
1 1 1 1 1 1 1 0 # q NOTHING
1 1 1 1 1 1 1 1 * q 2BYTE CMD
RST
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