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LC87F7032A Datasheet, PDF (3/21 Pages) Sanyo Semicon Device – CMOS IC FROM 32K byte, RAM 1024 byte on-chip 8-bit 1-chip Microcontroller
LC87F7032A
„SIO
• SIO0: 8-bit synchronous serial interface
1) LSB first/MSB first is selectable
2) Internal 8 bit baud-rate generator (fastest clock period 4/3 tCYC)
3) Consecutive automatic data communication (1 to 256 bits)
• SIO1: 8 bit asynchronous/synchronous serial interface
Mode 0: Synchronous 8 bit serial IO (2-wire or 3-wire, transmit clock 2 to 512 tCYC)
Mode 1: Asynchronous serial IO (half duplex, 8 data bits, 1 stop bit, baud rate 8 to 2048 tCYC)
Mode 2: Bus mode 1 (start bit, 8 data bits, transmit clock 2 to 512 tCYC)
Mode 3: Bus mode 2 (start detection, 8 data bits, stop detection)
„UART
• Full duplex
• 1 stop bit (2-bit in continuous data transmission)
• Built-in baudrate generator
„AD Converter
• 8-bit × 9-channels
„PWM
• Multifrequency 12-bit PWM × 1-channels
„Remote Control Receiver Circuit (sharing pins with P73, INT3, and T0IN)
• Noise rejection function (noise rejection filter’s time constant can be selected from 1/32/128 tCYC)
„Watchdog Timer
• Watchdog timer can produce interrupt or system reset.
• Watchdog timer has two types.
Use an external RC circuit
Use the microcontroller’s basetimer
„Clock Output Function
1) Able to output selected oscillation clock 1/1, 1/2, 1/4, 1/8, 1/16, 1/32, 1/64 as system clock.
2) Able to output oscillation clock of sub clock.
„Interrupts
• 20 sources, 10 vector addresses
1) Three priority (low, high and highest) multiple interrupts are supported. During interrupt handling, an equal or
lower priority interrupt request is postponed.
2) If interrupt requests to two or more vector addresses occur at once, the higher priority interrupt takes
precedence. In the case of equal priority levels, the vector with the lowest address takes precedence.
No. Vector Address
Level
Interrupt Source
1
00003H
X or L
INT0
2
0000BH
X or L
INT1
3
00013H
H or L
INT2/T0L
4
0001BH
H or L
INT3/base timer
5
00023H
H or L
T0H
6
0002BH
H or L
T1L/T1H
7
00033H
H or L
SIO0/UART1 receive
8
0003BH
H or L
SIO1/UART-send
9
00043H
H or L
ADC/T6/T7
10
0004BH
H or L
Port 0/T4/T5/PWM
• Priority levels X > H > L
• For equal priority levels, vector with lowest address takes precedence.
No.A0653-3/21