LC87F7032A Datasheet, PDF (14/21 Pages) Sanyo Semicon Device – CMOS IC FROM 32K byte, RAM 1024 byte on-chip 8-bit 1-chip Microcontroller

LC87F7032A
2. SIO1 Serial I/O Characteristics (Note 4-2-1)
Parameter
Frequency
Symbol
tSCK(3)
Low level
pulse width
High level
pulse width
Frequency
tSCKL(3)
tSCKH(3)
tSCK(4)
Low level
pulse width
High level
pulse width
Data setup time
tSCKL(4)
tSCKH(4)
tsDI(2)
Data hold time
thDI(2)
Pin/Remarks
Conditions
SCK1(P15) See Fig. 6.
VDD
2.4 to 3.6
SCK1(P15)
• CMOS output selected
• See Fig. 6.
2.4 to 3.6
SB1(P14),
SI1(P14)
• Must be specified with respect to
rising edge of SIOCLK.
• See Fig. 6.
2.4 to 3.6
2.4 to 3.6
min
2
1
1
2
0.03
0.03
Output delay
tdD0(4)
SO1(P13),
• Must be specified with respect to
time
SB1(P14)
falling edge of SIOCLK.
• Must be specified as the time to
the beginning of output state
2.4 to 3.6
change in open drain output
mode.
• See Fig. 6.
Note 4-2-1: These specifications are theoretical values. Add margin depending on its use.
Specification
typ
max
unit
tCYC
1/2
tSCK
1/2
µs
(1/3)tCYC
+0.05
Pulse Input Conditions at Ta = -20°C to +70°C, VSS1 = VSS2= 0V
Parameter
High/low
level pulse
width
Symbol
tPIH(1)
tPIL(1)
tPIH(2)
tPIL(2)
tPIH(3)
tPIL(3)
tPIH(4)
tPIL(4)
tPIL(6)
Pins
INT0(P70),
INT1(P71),
INT2(P72)
INT3(P73)
(Noise rejection ratio is 1/1.)
INT3(P73)
(Noise rejection ratio is
1/32.)
INT3(P73)
(Noise rejection ratio is
1/128.)
RES
Conditions
• Condition that interrupt is accepted
• Condition that event input to timer 0 is
accepted
• Condition that interrupt is accepted
• Condition that event input to timer 0 is
accepted
• Condition that interrupt is accepted
• Condition that event input to timer 0 is
accepted
• Condition that interrupt is accepted
• Condition that event input to timer 0 is
accepted
• Condition that reset is accepted
VDD[V]
2.4 to 3.6
2.4 to 3.6
2.4 to 3.6
2.4 to 3.6
2.4 to 3.6
min
1
2
64
256
200
Specification
typ
max
unit
tCYC
µs
No.A0653-14/21