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LC87F5NC8A Datasheet, PDF (3/25 Pages) Sanyo Semicon Device – CMOS IC FROM 128K byte, RAM 4096 byte on-chip 8-bit 1-chip Microcontroller
„Watchdog Timer
• External RC watchdog timer
• Interrupt and reset signals selectable
LC87F5NC8A
„Clock Output Function
1) Able to output selected oscillation clock 1/1, 1/2, 1/4, 1/8, 1/16, 1/32, 1/64 as system clock.
2) Able to output oscillation clock of sub clock.
„Interrupts
• 29 sources, 10 vector addresses
1) Provides three levels (low (L), high (H), and highest (X)) of multiplex interrupt control. Any interrupt
requests of the level equal to or lower than the current interrupt are not accepted.
2) When interrupt requests to two or more vector addresses occur at the same time, the interrupt of the highest
level takes precedence over the other interrupts. For interrupts of the same level, the interrupt into the smallest
vector address takes precedence.
No. Vector Address
Level
Interrupt Source
1
00003H
X or L
INT0
2
0000BH
X or L
INT1
3
00013H
H or L
INT2/T0L/INT4
4
0001BH
H or L
INT3/INT5/base timer0/base timer1
5
00023H
H or L
T0H/INT6
6
0002BH
H or L
T1L/T1H/INT7
7
00033H
H or L
SIO0/UART1 receive/UART2 receive
8
0003BH
H or L
SIO/UART1 transmit/UART2 transmit
9
00043H
H or L
ADC/T6/T7/PWM4, PWM5
10
0004BH
H or L
Port 0/T4/T5/PWM2, PWM3
• Priority levels X > H > L
• Of interrupts of the same level, the one with the smallest vector address takes precedence.
„Subroutine Stack Levels: 2048 levels maximum (the stack is allocated in RAM)
„High-speed Multiplication/Division Instructions
• 16-bits × 8-bits (5 tCYC execution time)
• 24-bits × 16-bits (12 tCYC execution time)
• 16-bits ÷ 8-bits (8 tCYC execution time)
• 24-bits ÷ 16-bits (12 tCYC execution time)
„Oscillation Circuits
• RC oscillation circuit (internal)
: For system clock
• CF oscillation circuit
: For system clock, with internal Rf
• Crystal oscillation circuit
: For low-speed system clock
• Multifrequency RC oscillation circuit (internal) : For system clock
„System Clock Divider Function
• Can run on low current.
• The minimum instruction cycle selectable from 250ns, 500ns, 1.0µs, 2.0µs, 4.0µs, 8.0µs, 16.0µs, 32.0µs, and
64.0µs (at a main clock rate of 12MHz).
No.A0929-3/25