LC87F5NC8A Datasheet, PDF (13/25 Pages) Sanyo Semicon Device – CMOS IC FROM 128K byte, RAM 4096 byte on-chip 8-bit 1-chip Microcontroller

LC87F5NC8A
Recommended Operating Conditions at Ta = -40°C to +85°C, VSS1 = VSS2 = VSS3 = VSS4 = 0V
Parameter
Operating
supply voltage
(Note2-1)
Symbol
VDD(1)
Pins/Remarks
VDD1=VDD2
=VDD3=VDD4
Conditions
0.245µs≤ tCYC≤200µs
0.367µs≤ tCYC≤200µs
1.470µs≤ tCYC≤200µs
VDD[V]
Specification
min
typ
max
unit
2.8
5.5
2.5
5.5
2.2
5.5
Memory
sustaining
supply voltage
VHD
VDD1=VDD2
=VDD3=VDD4
RAM and register contents in
HOLD mode.
2.0
5.5
High level input
voltage
VIH(1)
VIH(2)
Ports 1, 2, 3
SI2P0 to SI2P3
P71 to P73
P70 port input/
interrupt side
Ports 0, 8
Ports A, B, C, E, F
PWM0, PWM1
2.2 to 5.5
0.3VDD
+0.7
2.2 to 5.5
0.3VDD
+0.7
VDD
VDD
VIH(3)
P70 Watchdog timer
side
2.2 to 5.5
0.9VDD
VDD
V
VIH(4)
XT1, XT2, CF1,
RES
2.2 to 5.5 0.75VDD
VDD
Low level input
voltage
VIL(1)
Ports 1, 2, 3
SI2P0 to SI2P3
P71 to P73
P70 port input/
interrupt
4.0 to 5.5
2.2 to 4.0
VSS
VSS
0.1VDD
+0.4
0.2VDD
VIL(2)
Ports 0, 8
Ports A, B, C, E, F
PWM0, PWM1
2.5 to 5.5
2.2 to 5.5
VSS
VSS
0.15VDD
+0.4
0.2VDD
VIL(5)
Instruction cycle
time
VIL(6)
tCYC
(Note2-2)
Port 70 Watchdog
Timer
XT1, XT2, CF1, RES
2.5 to 5.5
2.5 to 5.5
2.8 to 5.5
2.5 to 5.5
VSS
VSS
0.245
0.367
0.8VDD
-1.0
0.25VDD
200
200 µs
2.2 to 5.5
1.470
200
External system FEXCF(1) CF1
clock frequency
• CF2 pin open
2.8 to 5.5
0.1
• System clock frequency
division rate=1/1
2.5 to 5.5
0.1
• External system clock
duty=50±5%
2.2 to 5.5
0.1
• CF2 pin open
2.8 to 5.5
0.2
• System clock frequency
2.5 to 5.5
0.2
division rate=1/2
2.2 to 5.5
0.2
12
8
2 _MHz
24.4
16
4
Oscillation
frequency
Range
(Note2-3)
FmCF(1) CF1, CF2
FmCF(2) CF1, CF2
FmCF(3) CF1, CF2
12MHz ceramic oscillation
See Fig. 1.
8MHz ceramic oscillation
See Fig. 1.
4MHz ceramic oscillation
See Fig. 1.
2.8 to 5.5
2.5 to 5.5
2.2 to 5.5
12
8
MHz
4
FmRC
Internal RC oscillation
2.5 to 5.5
0.3
1.0
2.0
FmMRC
Frequency variable RC
2.5 to 5.5
16
oscillation source oscillation
FsX’tal
XT1, XT2
32.768kHz crystal oscillation.
2.5 to 5.5
32.768
kHz
See Fig. 2.
Note 2-1: VDD must be held greater than or equal to 2.7V in the flash ROM onboard programming mode.
Note 2-2: Relationship between tCYC and oscillation frequency is 3/FmCF at a division ratio of 1/1 and 6/FmCF at
a division ratio of 1/2.
Note 2-3: See Tables 1 and 2 for the oscillation constants.
No.A0929-13/25