LC87F2708A_09 Datasheet, PDF (3/21 Pages) Sanyo Semicon Device – FROM 8K byte, RAM 512 byte on-chip 8-bit 1-chip Microcontroller

LC87F2708A
„Watchdog Timer
• Can generate the internal reset signal on a timer overflow monitored by the WDT-dedicated low-speed RC
oscillation clock (30kHz).
• Allows selection of continue, stop, or hold mode operation of the counter on entry into the HALT/ HOLD mode.
„Interrupts Source Flags
• 16 sources, 10 vector addresses
1) Provides three levels (low (L), high (H), and highest (X)) of multiplex interrupt control. Any interrupt requests of
the level equal to or lower than the current interrupt are not accepted.
2) When interrupt requests to two or more vector addresses occur at the same time, the interrupt of the highest level
takes precedence over the other interrupts. For interrupts of the same level, the interrupt into the smallest vector
address takes precedence.
No.
Vector Address
Level
Interrupt Source
1
00003H
X or L
INTA
2
0000BH
X or L
INTB
3
00013H
H or L
INTC/T0L/INTE
4
0001BH
H or L
INTD/INTF
5
00023H
H or L
T0H/SIO7
6
0002BH
H or L
T1L/T1H
7
00033H
H or L
HCT1
8
0003BH
H or L
HCT2
9
00043H
H or L
ADC/HPWM automatic stop/HPWM cycle
10
0004BH
H or L
None
• Priority levels X > H > L
• Of interrupts of the same level, the one with the smallest vector address takes precedence.
„Subroutine Stack Levels: 256levels maximum (The stack is allocated in RAM.)
„High-speed Multiplication/Division Instructions
• 16 bits × 8 bits
(5 tCYC execution time)
• 24 bits × 16 bits (12 tCYC execution time)
• 16 bits ÷ 8 bits
(8 tCYC execution time)
• 24 bits ÷ 16 bits (12 tCYC execution time)
„Oscillation Circuits
• Medium speed RC oscillation circuit (internal): For system clock (1MHz)
• Low speed RC oscillation circuit (internal):
For watchdog timer (30kHz)
• High speed RC oscillation circuit (internal):
For system clock (20MHz or 40MHz)
1) 2 source oscillation frequencies (20MHz or 40MHz) selectable for the high-speed RC oscillation circuit by
optional configuration.
„System Clock Divider Function
• Can run on low current.
• The minimum instruction cycle selectable from 300ns, 600ns, 1.2μs, 2.4μs, 4.8μs, 9.6μs, 19.2μs, 38.4μs, and 76.8μs
(when high speed RC oscillation is selected for system clock.).
„Internal reset circuit
• Power-on reset (POR) function
1) POR reset is generated only at power-on time.
2) The POR release level can be selected from 3 levels (2.87V, 3.86V, and 4.35V) by optional configuration.
• Low-voltage detection reset (LVD) function
1) LVD and POR functions are combined to generate resets when power is turned on and when power voltage falls
below a certain level.
2) The use or disuse of the LVD function and the low voltage threshold level (3 levels: 2.81V, 3.79V and 4.28V).
can be selected by optional configuration.
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