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LC78622NE Datasheet, PDF (28/31 Pages) Sanyo Semicon Device – Compact Disc Player DSP
LC78622NE
27. CD-DSP Functional Comparison
Product
Function
EFM-PLL
RAM
Playback speed
Digital output
Interpolation
Zero-cross muting
Level meter peak
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Digital attenuator
LC786021E
Built-in VCO
FR = 1.2 KΩ
16K
2!
q
4
q
–12 dB, –∞
q
q
q
Digital filters
8fs
Digital de-emphasis
q
General-
Output
2
purpose port I/O
!
VCD support
!
Anti-shock interface
q
LC78625E
Built-in VCO
FR = 1.2 KΩ
16K
2!
q
4
q
–12 dB, –∞
q
q
q
8fs
q
2
(4)
q
q
Anti-shock control
!
!
CD text
!
!
CD-ROM interface
q
q
1-bit DAC
q
q
L.P.F
!
!
Supply voltage
3.6 to 5.5 V
3.0 to 5.5 V
Package
QFP80E
QFP80E
Notes on Application Design
LC78630E
Built-in VCO
FR = 1.2 KΩ
18K
4!
q
2
q
–∞
!
q
q
2fs
q
2
2 + (4)
q
q
!
!
q
q
!
3.6 to 5.5 V
QFP80E
LC78624E
Built-in VCO
FR = 1.2 KΩ
16K
2!
q
2
q
–∞
!
q
!
!
!
!
5
!
!
!
q
!
!
!
3.0 to 5.5 V
QFP64E
LC78626E
(LC78626KE)
Built-in VCO
FR = 5.1 KΩ
16K
2!
q
2
q
–∞
!
q
q
4fs
(8fs)
q
!
1 + (3)
!
Not required
q
max 4MDRAM
(max 16MDRAM)
!
!
q
q
3.0 to 5.5 V
(3.0 to 3.6 V)
QFP100E
LC78622E
LC78622NE
Built-in VCO
FR = 1.2 KΩ
16K
16K
2!
2!
q
q
2
2
q
q
–∞
–∞
!
!
q
q
q
q
4fs
8fs
q
q
!
(3)
5
5
!
!
!
!
!
!
!
!
q
q
3.0 to 5.5 V
QFP64E
!
!
q
q
3.6 to 5.5 V
QFP64E
While it goes without saying that to achieve system reliability the absolute maximum ratings and allowable operating
conditions specified for this IC must be strictly adhered to, adequate consideration must also be given to the operating
environmental conditions, such as ambient temperature and static electricity, and to the mounting conditions used.
This section presents items that require special care during application design and IC mounting.
Handling of Unused Pins
• If unused input pins on this IC are left in the open state during IC operation, there are times when the IC may enter an
unstable state. Always follow all the directions for handling unused pins included in the documentation for this IC.
Also, do not connect any output pins to power supply, ground, or any other output lines.
• All general-purpose I/O ports must either be set to the output state and set to output a low level in software, or must be
left in the input state and pulled up or pulled down to a fixed input level.
Latch-up Prevention
• Due to the structure of this IC, all supply voltage pins must be supplied with the same potential.
— Also supply the same potential to the servo system ASP. The slice level control circuit is shared with this IC, and
application of the same potential is necessary. Also, the same potential must be supplied to all supply voltage pins
on the ASP IC.
• Latch-up may occur if any discrepancy occurs in the timing of the rise of the supply voltage applied to the different
supply voltage pins. Do not allow timing discrepancies to occur when power is first applied.
• Do not allow the pin voltages on any of the input or output pins to exceed VDD or to fall lower than VSS. The timing of
signal application requires special care at power on to assure that this condition is met.
• Do not allow overvoltages or abnormal noise to be applied to this IC.
continued on next page.
No. 6015-28/31