LC87F2H08A Datasheet, PDF (22/27 Pages) Sanyo Semicon Device – CMOS IC 8K-byte FROM and 256-byte RAM integrated 8-bit 1-chip Microcontroller

LC87F2H08A
Characteristics of a Sample Main System Clock Oscillation Circuit
Given below are the characteristics of a sample main system clock oscillation circuit that are measured using a
SANYO-designated oscillation characteristics evaluation board and external components with circuit constant values
with which the oscillator vendor confirmed normal and stable oscillation.
Table 1 Characteristics of a Sample Main System Clock Oscillator Circuit with a Ceramic Oscillator
• CF oscillation normal amplifier size selected (CFLAMP=0)
„MURATA
Nominal
Frequency
Type
Oscillator Name
Circuit Constant
C1
C2
Rf
Rd
[pF] [pF]
[Ω]
[Ω]
Operating
Voltage Range
[V]
Oscillation
Stabilization Time
typ
max
[ms]
[ms]
12MHz
SMD
CSTCE12M0G52-R0
(10) (10) Open 1.0k
2.7 to 5.5
0.1
0.5
10MHz
SMD
CSTCE10M0G52-R0
Open 680
(10) (10)
Open 1.0k
2.2 to 3.6
2.3 to 5.5
0.1
0.5
0.1
0.5
LEAD
CSTLS10M0G53-B0
(15) (15) Open 1.0k
2.5 to 5.5
0.1
0.5
8MHz
SMD
LEAD
CSTCE8M00G52-R0
CSTLS8M00G53-B0
(10) (10) Open 1.5k
(15) (15) Open 1.5k
2.2 to 5.5
2.2 to 5.5
0.1
0.5
0.1
0.5
6MHz
SMD
LEAD
CSTCR6M00G53-R0
CSTLS6M00G53-B0
(15) (15) Open 2.2k
(15) (15) Open 2.2k
2.2 to 5.5
2.2 to 5.5
0.1
0.5
0.1
0.5
4MHz
SMD
CSTCR4M00G53-R0
Open 1.5k
(15) (15)
Open 3.3k
1.8 to 2.7
1.9 to 5.5
0.2
0.6
0.2
0.6
LEAD
CSTLS4M00G53-B0
(15) (15) Open 3.3k
1.9 to 5.5
0.2
0.6
Remarks
Internal
C1,C2
• CF oscillation low amplifier size selected (CFLAMP=1)
„MURATA
Nominal
Frequency
Type
Oscillator Name
Circuit Constant
C1
C2
Rf
Rd
[pF] [pF]
[Ω]
[Ω]
Operating
Voltage Range
[V]
Oscillation
Stabilization Time
Typ
Max
[ms]
[ms]
Remarks
SMD
CSTCR4M00G53-R0
Open 1.0k
(15) (15)
Open 2.2k
2.1 to 2.7
2.5 to 5.5
0.2
0.6
0.2
0.6
4MHz
LEAD
CSTCR4M00G53095-R0 (15)
CSTLS4M00G53-B0
(15)
(15) Open 1.0k
Open 1.0k
(15)
Open 2.2k
1.9 to 2.7
2.2 to 2.7
2.5 to 5.5
0.2
0.7
0.2
0.6
0.2
0.6
Internal
C1,C2
CSTLS4M00G53095-B0 (15) (15) Open 1.0k
2.0 to 2.7
0.2
0.7
The oscillation stabilization time refers to the time interval that is required for the oscillation to get stabilized after VDD
goes above the operating voltage lower limit (see Figure 3).
No.A0970-22/27