LC875J64C Datasheet, PDF (22/23 Pages) Sanyo Semicon Device – ROM 64K/56K/48K byte, RAM 2048 byte on-chip 8-bit 1-chip Microcontroller

LC875J64C/875J56C/875J48C
VDD
RRES
Note:
Determine the value of CRES and RRES so that the
RES
reset signal is present for a period of 200µs after the
CRES
supply voltage goes beyond the lower limit of the IC’s
operating voltage.
Figure 5 Reset Circuit
SIOCLK:
DATAIN:
DATAOUT:
SIOCLK:
DATAIN:
DATAOUT:
SIOCLK:
DATAIN:
DATAOUT:
DI0 DI1
DI2
DI3
DI4
DI5
DI6
DI7
DI8
DO0 DO1 DO2 DO3 DO4 DO5 DO6
tSCKL
tSCK
tSCKH
DO7
Data RAM
transfer period
(SIO0 only)
DO8
tsDI
thDI
tdDO
tSCKLA
tsDI
tdDO
Data RAM
transfer period
(SIO0 only)
tSCKHA
thDI
Figure 6 Serial I/O Output Waveforms
tPIL
tPIH
Figure 7 Pulse Input Timing Signal Waveform
No.8302-22/23