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LC87F57C8A Datasheet, PDF (18/28 Pages) Sanyo Semicon Device – 8 BIT SINGLE CHIP MICROCONTROLLER
LC87F57C8A
5. Parallel Input/Output Characteristics
/ Ta=-20°C to +70°C, VSS1=VSS2=VSS3=0V
Note: If Port A terminals will be used as RS, WR , RD or CS , then it should be set to CMOS format by
option data. Refer to figures 8 and 9 for parallel output timing.
Parameter
Symbol
Pins
Write cycle,
Read cycle
Address set-up
time
tC(1)
tsA(1)
tsA(2)
• WR (PA3), PB0-PB7
• RD (PA4), PC0-PC7
RD (PA4), PC0-PC7
Address hold
time
thA(1)
thA(2)
RD (PA4), PC0-PC7
WR (PA3), PC0-PC7
RS set-up time tsRS(1) WR (PA3), RS(PA5),
CS (PAX)
CS
set-up time
tsRS(2)
tsRS(3)
tsCS(1)
RD (PA4), RS(PA5)
RD (PA4), RS(PA5)
RD (PA4), CS (PAX)
tsCS(2) WR (PA3), CS (PAX)
RS
hold time
CS
hold time
thRS(1) WR (PA3), RS(PA5)
thRS(2)
thRS(3)
thCS(1)
RD (PA4), RS(PA5),
CS (PAX)
RD (PA4), RS(PA5),
CS (PAX)
RD (PA4), RS(PA5)
thCS(2) WR (PA3), RS(PA5)
WR
tWRH(1) WR (PA3)
’H’ pulse width
tWRH(2) WR (PA3)
WR
tWRL(1) WR (PA3)
’L’ pulse width
tWRL(2) WR (PA3)
Conditions
From address set-up
until control signal
changes
From change of RD
until address change
From change of WR
until address change
From change of RS,
CS until change in
WR
from change of RS
until change in RD
From change in CS
until change in RD
From change in CS
until change in WR
From change in WR
until change in RS
From change in RD
until change in RS,
CS
From change in RD
until change in CS
From change in WR
until change in CS
VDD[V]
2.5 - 5.5
2.5 - 5.5
2.5 - 5.5
2.5 - 5.5
2.5 - 5.5
2.5 - 5.5
2.5 - 5.5
2.5 - 5.5
2.5 - 5.5
2.5 - 5.5
2.5 - 5.5
2.5 - 5.5
2.5 - 5.5
2.5 - 5.5
2.5 - 5.5
2.5 - 5.5
2.5 - 5.5
2.5 - 5.5
2.5 - 5.5
Limits
min.
1/3tCYC
-30ns
2/3tCYC
-30ns
1/6tCYC
5
1/6tCYC
-15ns
1/6tCYC
-15ns
1/3tCYC
-15ns
1/3tCYC
-15ns
2/3tCYC
-15ns
0
1/6tCYC
0
1/6tCYC
0
1/6tCYC
-5ns
2/3tCYC
-5ns
1/6tCYC
-5ns
1/3tCYC
-5ns
typ.
1
1/6
tCYC
2/3
tCYC
1/6
tCYC
1/3
tCYC
max. unit
tCYC
tCYC
& ns
ns
tCYC
& ns
ns
tCYC
& ns
ns
tCYC
& ns
ns
tCYC
& ns
(Continued)
18/27
Ver.1.00