LC87F57C8A Datasheet, PDF (11/28 Pages) Sanyo Semicon Device – 8 BIT SINGLE CHIP MICROCONTROLLER

LC87F57C8A
Port Output Configuration
Output configuration and pull-up resistor options are shown in the following table.
Input is possible even when a port is in output mode.
Terminal
Option
Option
Output Format
Pull-up resistor
applies to:
P00 - P07
each bit
1
CMOS
Programmable (Note 1)
2
Nch-open drain
None
P10 - P17
each bit
1
CMOS
Programmable
P20 - P27
2
Nch-open drain
Programmable
PA2 - PA5
each bit
1
CMOS
Programmable
PB0 - PB7(*)
PC0 - PC7
2
Nch-open drain
Programmable
P70
-
None
Nch-open drain
Programmable
P71 - P73
-
None
CMOS
Programmable
P80 - P82
-
None
Nch-open drain
None
PWM0, PWM1
-
None
CMOS
None
XT1
-
None
Input only
None
XT2
-
None
Output for 32.768kHz crystal oscillation
None
Note 1 Programmable pull-up resistor of Port 0 is specified in nibble units (P00 - P03, P04 - P07).
(*) When in parallel interface mode, PB0 - PB7 output format is CMOS, regardless of any selected option.
Note: To reduce VDD signal noise and to increase the duration of the backup battery supply, VSS1, VSS2,
and VSS3 should connect to each other and they should also be grounded.
Example 1 : During backup in hold mode, port output ‘H’ level is supplied from the back-up capacitor.
Power
Supply
Back-up
capacitor
LSI
VDD1
VDD2
VDD3
VSS1 VSS2 VSS3
Ver.1.00
11/27