LC87F6D64A Datasheet, PDF (14/19 Pages) Sanyo Semicon Device – FROM 64K byte, RAM 2048 byte on-chip 8-bit 1-chip Microcontroller

LC87F6D64A
AD Converter Characteristics at Ta = -40°C to +85°C, VSS1 = 0V
Parameter
Resolution
Absolute
precision
Symbol
Pin/Remarks
N
AN0(P00) to
ET
AN7(P07)
Conditions
(Note 6-1)
VDD[V]
min
3.0 to 5.5
3.0 to 5.5
Specification
typ
max
unit
8
bit
±1.5 LSB
Conversion time tCAD
AD conversion time=32×tCYC
15.62
97.92
(ADCR2=0)
4.5 to 5.5
(tCYC=
(tCYC=
(Note 6-2)
0.488μs)
3.06μs)
23.52
97.92
AD conversion time=64×tCYC
3.0 to 5.5
(tCYC=
0.735μs)
18.82
(tCYC=
3.06μs)
μs
97.92
(ADCR2=1)
4.5 to 5.5
(tCYC=
(tCYC=
(Note 6-2)
0.294μs)
1.53μs)
47.04
97.92
3.0 to 5.5
(tCYC=
0.735μs)
(tCYC=
1.53μs)
Analog input
voltage range
VAIN
3.0 to 5.5
VSS
VDD
V
Analog port
IAINH
VAIN=VDD
3.0 to 5.5
input current
IAINL
VAIN=VSS
3.0 to 5.5
-1
Note 6-1: Absolute precision not including quantizing error (±1/2 LSB).
1
μA
Note 6-2: Conversion time means time from executing AD conversion instruction to loading complete digital value to
register.
Consumption Current Characteristics at Ta = -40°C to +85°C, VSS1 = 0V
Parameter
Current
dissipation
during basic
operation
(Note 7-1)
Symbol
IDDOP(1)
Pin/
Remarks
VDD1
=VDD2
=VDD3
Conditions
• FmCF=10Hz for ceramic resonator
oscillation
• System clock: 10MHz
• Internal RC oscillation stopped.
• 1/1 frequency division ratio
VDD[V]
min
4.5 to 5.5
Specification
typ
max
unit
8.0
24
3.0 to 4.5
6.1
19
IDDOP(2)
• CF1=15MHz for external clock
• System clock: CF1 oscillation
• Internal RC oscillation stopped.
• 1/2 frequency division ratio
4.5 to 5.5
3.0 to 4.5
10.5
32
9.5
28
mA
IDDOP(3)
• FmCF=4MHz for ceramic resonator
oscillation
4.5 to 5.5
3.8
9.5
• System clock: 4MHz
• Internal RC oscillation stopped.
3.0 to 4.5
3.1
7.8
• 1/1 frequency division ratio
IDDOP(4)
• FmCF=0Hz (No oscillation)
• System clock: RC oscillation
• Divider set to 1/2
4.5 to 5.5
2.5 to 4.5
0.72
3
0.53
2
IDDOP(5)
• FsX’tal=32.768kHz for crystal oscillation
• System clock: 32.768KHz
4.5 to 5.5
• Internal RC oscillation stopped.
• 1/2 frequency division ratio
2.5 to 4.5
Note 7-1: The currents of the output transistors and the pull-up MOS transistors are ignored.
39
220
μA
25
150
Continued on next page.
No.A1007-14/19