LC875J96B Datasheet, PDF (14/23 Pages) Sanyo Semicon Device – ROM 96K/80K/72K byte, RAM 4096 byte on-chip 8-bit 1-chip Microcontroller

LC875J96B/875J80B/875J72B
Serial Input/Output Characteristics at Ta = -30°C to +70°C, VSS1 = VSS2 = VSS3 = 0V
1. SIO0 Serial I/O Characteristics (Note 4-1-1)
Parameter
Frequency
Symbol
tSCK(1)
Pin/Remarks
Conditions
SCK0(P12)
See Fig. 6.
Specification
VDD[V]
min
typ
max
unit
2
Low level
pulse width
High level
pulse width
Frequency
Low level
pulse width
High level
pulse width
Data setup time
Data hold time
tSCKL(1)
tSCKH(1)
tSCKHA(1)
tSCK(2)
SCK0(P12)
tSCKL(2)
tSCKH(2)
tSCKHA(2)
tsDI(1)
thDI(1)
SB0(P11),
SI0(P11)
1
2.2 to 5.5
1
• Continuous data
transmission/reception mode
4
• See Fig. 6.
• (Note 4-1-2)
• CMOS output selected
4/3
• See Fig. 6.
tCYC
1/2
tSCK
2.2 to 5.5
1/2
• Continuous data
transmission/reception mode
• CMOS output selected
• See Fig. 6.
• Must be specified with respect
to rising edge of SIOCLK.
• See Fig. 6.
tSCKH(2)
+2tCYC
0.03
2.2 to 5.5
tSCKH(2)
+(10/3)
tCYC
tCYC
0.03
Output delay
time
tdD0(1)
tdD0(2)
tdD0(3)
SO0(P10),
SB0(P11)
• Continuous data
transmission/reception mode
• (Note 4-1-3)
• Synchronous 8-bit mode
• (Note 4-1-3)
(Note 4-1-3)
2.2 to 5.5
(1/3)tCYC
+0.05
µs
1tCYC
+0.05
(1/3)tCYC
+0.05
Note 4-1-1: These specifications are theoretical values. Add margin depending on its use.
Note 4-1-2: To use serial-clock-input in continuous trans/rec mode, a time from SI0RUN being set when serial clock is
"H" to the first negative edge of the serial clock must be longer than tSCKHA.
Note 4-1-3: Must be specified with respect to falling edge of SIOCLK. Must be specified as the time to the beginning of
output state change in open drain output mode. See Fig. 6.
No.0382-14/23