LC872G08A_10 Datasheet, PDF (14/27 Pages) Sanyo Semicon Device – 8K/6K/4K-byte ROM and 256-byte RAM integrated 8-bit 1-chip Microcontroller

LC872G08A/06A/04A
Serial I/O Characteristics at Ta = -40°C to +85°C, VSS1 = 0V
1. SIO0 Serial I/O Characteristics (Note 4-1-1)
Parameter
Frequency
Low level
pulse width
High level
pulse width
Frequency
Low level
pulse width
High level
pulse width
Data setup time
Symbol
tSCK(1)
tSCKL(1)
tSCKH(1)
tSCK(2)
tSCKL(2)
tSCKH(2)
tsDI(1)
Data hold time
thDI(1)
Output delay
time
tdD0(1)
tdD0(2)
tdD0(3)
Pin/
Remarks
SCK0(P12)
Conditions
• See Fig. 5.
SCK0(P12)
• CMOS output selected
• See Fig. 5.
SB0(P11),
SI0(P11)
SO0(P10),
SB0(P11)
• Must be specified with
respect to rising edge of
SIOCLK.
• See Fig. 5.
• Continuous data
transmission/reception mode
(Note 4-1-2)
• Synchronous 8-bit mode
(Note 4-1-2)
(Note 4-1-2)
VDD[V]
1.8 to 5.5
1.8 to 5.5
1.8 to 5.5
1.8 to 5.5
min
2
1
Specification
typ
max
1
4/3
1/2
1/2
unit
tCYC
tSCK
0.05
0.05
(1/3)tCYC
+0.08
μs
1tCYC
+0.08
(1/3)tCYC
+0.08
Note 4-1-1: These specifications are theoretical values. Add margin depending on its use.
Note 4-1-2: Must be specified with respect to falling edge of SIOCLK. Must be specified as the time to the beginning of
output state change in open drain output mode. See Fig. 5.
2. SIO1 Serial I/O Characteristics (Note 4-2-1)
Parameter
Frequency
Symbol
tSCK(3)
Pin/
Remarks
SCK1(P15)
Conditions
See Fig. 5.
Low level
pulse width
High level
pulse width
Frequency
Low level
pulse width
High level
pulse width
Data setup time
Data hold time
tSCKL(3)
tSCKH(3)
tSCK(4)
tSCKL(4)
tSCKH(4)
tsDI(2)
thDI(2)
SCK1(P15) • CMOS output selected
• See Fig. 5.
SB1(P14),
SI1(P14)
• Must be specified with respect
to rising edge of SIOCLK.
• See Fig. 5.
VDD[V]
1.8 to 5.5
1.8 to 5.5
min
2
Specification
typ
max
1
1
2
1/2
1/2
0.05
1.8 to 5.5
0.05
unit
tCYC
tSCK
Output delay time tdD0(4)
SO1(P13), • Must be specified with respect
SB1(P14)
to falling edge of SIOCLK.
• Must be specified as the time
to the beginning of output state
1.8 to 5.5
change in open drain output
mode.
• See Fig. 5.
Note 4-2-1: These specifications are theoretical values. Add margin depending on its use.
μs
(1/3)tCYC
+0.08
No.A1400-14/27