LC87BK08A Datasheet, PDF (13/27 Pages) Sanyo Semicon Device – 8-bit 1-chip Microcontroller

LC87BK08A/06A/04A
Allowable Operating Conditions at Ta = -40°C to +85°C, VSS1 = 0V
Parameter
Symbol
Operating
VDD
supply voltage
Pin/Remarks
VDD1
Conditions
0.245μs ≤ tCYC ≤ 200μs
VDD[V]
Specification
min
typ
max
unit
2.7
5.5
Memory
VHD
VDD1
RAM and register contents sustained
sustaining
in HOLD mode.
1.6
supply voltage
High level
input voltage
Low level
input voltage
VIH(1)
VIH(2)
VIH(3)
VIL(1)
VIL(2)
Ports 1, 2, 7
Ports 0
CF1, CF2, RES
Ports 1, 2, 7
Ports 0
2.7 to 5.5
2.7 to 5.5
2.7 to 5.5
4.0 to 5.5
2.7 to 4.0
4.0 to 5.5
0.3VDD+0.7
0.3VDD+0.7
0.75VDD
VSS
VSS
VSS
VDD
VDD
V
VDD
0.1VDD+0.4
0.2VDD
0.15VDD+0.4
High level
output current
VIL(3)
IOH(1)
IOH(2)
CF1, CF2, RES
Ports 0, 1, 2
Per 1 applicable pin
2.7 to 4.0
2.7 to 5.5
4.5 to 5.5
2.7 to 4.5
VSS
VSS
-1.0
-0.35
0.2VDD
0.25VDD
IOH(3)
IOH(4)
P05 (System clock
output function
used)
Per 1 applicable pin
4.5 to 5.5
-6.0
2.7 to 4.5
-1.4
∑IOH(1)
Ports 0, 1, 2
Total of all applicable pins
4.5 to 5.5
-25
∑IOH(2)
2.7 to 4.5
-8.0
Low level
output current
IOL(1)
IOL(2)
IOL(3)
Ports 0, 1, 2
P70, CF2
Per 1 applicable pin
Per 1 applicable pin
4.5 to 5.5
2.7 to 4.5
2.7 to 5.5
7
1 _mA
1
IOL(4)
P00, P01
Per 1 applicable pin
4.5 to 5.5
15
IOL(5)
2.7 to 4.5
2
∑IOL(1)
Ports 0
Total of all applicable pins
4.5 to 5.5
40
∑IOL(2)
2.7 to 4.5
10
∑IOL(3)
Ports 0, 1, 2, CF2 Total of all applicable pins
4.5 to 5.5
70
∑IOL(4)
2.7 to 4.5
21
∑IOL(5)
Ports 7
Total of all applicable pins
2.7 to 5.5
1
Instruction
tCYC
cycle time
2.7 to 5.5
0.245
200 μs
(Note 2-1)
External
FEXCF
CF1
• CF2 pin open
system clock
frequency
• System clock frequency division
2.7 to 5.5
0.1
12
ratio=1/1
• External system clock duty=50±5%
• CF2 pin open
• System clock frequency division
3.0 to 5.5
0.2
ratio=1/2
MHz
24.4
• External system clock duty=50±5%
Note 2-1: Relationship between tCYC and oscillation frequency is 3/FmCF at a division ratio of 1/1 and 6/FmCF at
a division ratio of 1/2.
Continued on next page.
No.A1984-13/27