LC863432A Datasheet, PDF (12/19 Pages) Sanyo Semicon Device – 8-Bit Single-Chip Microcontroller

LC863432A/28A/24A/20A/16A
4. IIC Input/Output Conditions at Ta=-10°C to +70°C, VSS=0V
Parameter
Symbol
Standard
min.
max.
High speed
unit
min.
max.
SCL Frequency
fSCL
0
100
0
400 kHz
BUS free time between stop - start
tBUF
4.7
-
1.3
-
µs
HOLD time of start, restart condition
tHD;STA
4.0
-
0.6
-
µs
L time of SCL
tLOW
4.7
-
1.3
-
µs
H time of SCL
tHIGH
4.0
-
0.6
-
µs
Set-up time of restart condition
tSU;STA
4.7
-
0.6
-
µs
HOLD time of SDA
tHD;DAT
0
-
0
0.9
µs
Set-up time of SDA
tSU;DAT
250
-
100
-
ns
Rising time of SDA, SCL
tR
-
1000 20+0.1Cb 300
ns
Falling time of SDA, SCL
tF
-
300 20+0.1Cb 300
ns
Set-up time of stop condition
tSU;STO
4.0
-
0.6
-
µs
Refer to figure 8
(Note) Cb : Total capacitance of all BUS (unit : pF)
5. Pulse Input Conditions at Ta=-10°C to +70°C, VSS=0V
Parameter Symbol
Pins
Conditions
Ratings
unit
VDD[V] min. typ. max.
High/low level tPIH(1) •INT0, INT1
pulse width tPIL(1) •INT2/T0IN
•Interrupt acceptable 4.5 to 5.5 1
•Timer0-countable
tCYC
tPIH(2) INT3/T0IN
•Interrupt acceptable 4.5 to 5.5 2
tPIL(2) (1 tCYC is
•Timer0-countable
selected for noise
rejection clock.)
tPIH(3) INT3/T0IN
•Interrupt acceptable 4.5 to 5.5 32
tPIL(3) (16 tCYC is
•Timer0-countable
selected for noise
rejection clock.)
tPIH(4) INT3/T0IN
•Interrupt acceptable 4.5 to 5.5 128
tPIL(4) (64 tCYC is
•Timer0-countable
selected for noise
rejection clock.)
tPIL(5) _RES
Reset acceptable
4.5 to 5.5 200
µs
tPIH(6) _{HS , VS}
tPIL(6)
•Display position
4.5 to 5.5 8
controllable (Note)
•The active edge of
HS and VS must
be apart at least
1 tCYC.
•Refer to figure 6.
Rising/falling tTHL
HS
time
tTLH
Refer to figure 6.
4.5 to 5.5
500 ns
No.6846-12/19