LV1605M Datasheet, PDF (11/24 Pages) Sanyo Semicon Device – Monolithic Linear IC Analog Signal Processor for CD Players

LV1605M
• Focus judgment
The pickup is judged to get in focus when the Scurve reaches the REF level after the level REF + 0.2 V has been
detected in the focus error signal Scurve.
REF+0.2V
Point where focus
is achieved
A13936
• Disc defect detection
The mirror surface detection level is held by the capacitor connected to LF2 (pin 56), and a high level is output from
DEF (pin 46) if the dropout level in the EFM signal (RFSM output) rises above 0.35V. When DEF (pin 46) goes high,
the tracking servo goes to THLD mode. To prevent the tracking servo from going to THLD mode when a disc defect
is detected, either short DEF (pin 46) or short LF2 (pin 56) to ground. This prevents the DEFECT output from being
issued.
EFM signal
(RFSM output)
LF2(Pin 56)
0.35V
DEF(Pin46)
A13937
• Microcontroller interface
Since the Reset (Nothing) command initializes the LV1605M, it must be used with care. The LV1605M's command
acceptance (mode switching) timing is such that the mode switches on the (130kHz) clock cycle following the CE
(RWC) falling edge. Therefore, a low-level period in the CE signal of at least 10 µs is required when issuing
consecutive commands. The 130kHz clock is required for this reason. The various LV1605M instructions can be
issued by setting CE high and then, in synchronization with the CL clock, issuing the command from the
microcontroller, LSB first, to DAT (pin 42). Note that commands are executed starting at the fall of the CE signal.
Timing Chart
CE(RWC)
CL(CQCK)
DAT(COIN)
LSB
MSB
A13938
* Items in parentheses are DSP pin names.
No. 7809-11/24