LV1605M Datasheet, PDF (10/24 Pages) Sanyo Semicon Device – Monolithic Linear IC Analog Signal Processor for CD Players

LV1605M
• Sled servo
The response characteristics are set with SLEQ (pin 28). The amplifier that follows SLEQ (pin 28) provides a muting
function; that muting function is turned on by the SLED OFF command. The sled is advanced by applying a current
input to SL- (pin 29) and SL+ (pin 30). In particular, connect the SLEQ pin to a microcontroller output port via a
resistor, and set the sled advance gain by the value of that resistor. Note that an offset in the SLD output will occur if
there is a discrepancy between the values of the SL- (pin 29) and SL+ (pin 30) resistors. The muting function also
operates on disc defect detection.
• Spindle servo
A servo circuit to hold the disc at a constant linear speed is formed in conjunction with the DSP. The IC receives a
signal from the DSP at CLV (pin 39) and outputs a signal from SPD (pin 27). The equalizer characteristics are set
with SP (pin 24), SP- (pin 26), and SPD (pin 27). The 12cm mode amplifier gain is set by the resistor connected
between SPG (pin 25) and the reference voltage. In 8cm mode, the amplifier is buffered internally and independent of
SPG (pin 25). Note that the gain must first be set for 8cm mode and then set for 12cm mode. Note that circuit can be
forcibly set to the 8cm mode gain regardless of the 8/12cm mode setting by setting SPG (pin 25) to the open state.
The muting function operates on disc defect detection.
• TES and HFL (traversal signals)
When the pickup moves from the outside of the disc towards the inside, the EF output from the pickup is connected
so that the HFL and TES signals have the phase relationship shown in the figure. The TES comparator is a negative
polarity comparator with respect to the TESI input, and has a hysteresis of about ±100mV. A bandpass filter used to
extract only the required signal components from the TE signal is formed externally.
2.1V
RFSM
1.47V
1.1V
HFL
TES
TE
A13934
• DRF (optical amplitude judgment)
A peak hold function using the PH1 (pin 50) capacitor is applied to the EFM signal (RFSM output). This circuit
outputs a high level when the RFSM peak value exceeds about 1.45V. The PH1 (pin 50) capacitor is related to the
settings for both the DRF detection time constant and the RF AGC response.
DRF
RFSM
FE
Pickup position
Point where focus
is achieved
2.1V
1.45V
1.1V
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