K9F2808Q0C Datasheet, PDF (8/33 Pages) Samsung semiconductor – 16M x 8 Bit , 8M x 16 Bit NAND Flash Memory

K9F2808Q0C-DCB0,DIB0 K9F2816Q0C-DCB0,DIB0 K9F2808U0C-VCB0,VIB0
K9F2808U0C-YCB0,YIB0 K9F2816U0C-YCB0,YIB0
K9F2808U0C-DCB0,DIB0 K9F2816U0C-DCB0,DIB0
FLASH MEMORY
Figure 1-2. K9F2816X0C (X16) FUNCTIONAL BLOCK DIAGRAM
VCC
VSS
A9 - A23
A0 - A7
X-Buffers
Latches
& Decoders
Y-Buffers
Latches
& Decoders
128M + 4M Bit
NAND Flash
ARRAY
(256 + 8)Word x 32768
Command
Command
Register
Page Register & S/A
Y-Gating
I/O Buffers & Latches
CE
Control Logic
RE
& High Voltage
WE
Generator
Global Buffers
Output
Driver
VCC/VCCQ
VSS
I/0 0
I/0 15
CLE ALE WP
Figure 2-2. K9F2816X0C (X16) ARRAY ORGANIZATION
1 Block =32 Pages
= (8K + 256) Word
32K Pages
(=1,024 Blocks)
Page Register
(=256 Words)
256Word
8 Word
1 Page = 264 Word
1 Block = 264 Word x 32 Pages
= (8K + 256) Word
1 Device = 264Words x 32Pages x 1024 Blocks
= 132 Mbits
16 bit
Page Register
256 Word
8 Word
I/O 0 ~ I/O 15
I/O 0 I/O 1 I/O 2 I/O 3 I/O 4
1st Cycle
A0
A1
A2
A3
A4
2nd Cycle A9
A10
A11
A12
A13
3rd Cycle A17
A18
A19
A20
A21
NOTE : Column Address : Starting Address of the Register.
* L must be set to "Low".
I/O 5
A5
A14
A22
I/O 6
A6
A15
A23
I/O 7
A7
A16
L*
I/O8 to 15
L*
Column Address
L*
Row Address
(Page Address)
L*
8