S3P80C5 Datasheet, PDF (76/263 Pages) Samsung semiconductor – 8-Bit CMOS Microcontrollers

S3P80C5/C80C5/C80C8
CONTROL REGISTERS
IRQ — Interrupt Request Register
DCH
Bit Identifier
.7
.6
.5
.4
.3
.2
.1
RESET Value
0
0
0
0
0
0
0
Read/Write
R
R
R
R
R
R
R
Addressing Mode
Register addressing mode only
.7
Level 7 (IRQ7) Request Pending Bit; External Interrupts P0.7–P0.4
0 Not pending
1 Pending
.6
Level 6 (IRQ6) Request Pending Bit; External Interrupts P0.3–P0.0
0 Not pending
1 Pending
.5
Not used for S3P80C5/C80C5/C80C8.
.4
Level 4 (IRQ4) Request Pending Bit; Counter A Interrupt
0 Not pending
1 Pending
.3–.2
Not used for S3P80C5/C80C5/C80C8.
.1
Level 1 (IRQ1) Request Pending Bit; Timer 1 Match or Overflow
0 Not pending
1 Pending
.0
Level 0 (IRQ0) Request Pending Bit; Timer 0 Match or Overflow
0 Not pending
1 Pending
NOTE: Interrupt level IRQ2, IRQ3 and IRQ5 is not used in the S3P80C5/C80C5/C80C8 interrupt structure.
Set 1
.0
0
R
4-13