S3P80C5 Datasheet, PDF (227/263 Pages) Samsung semiconductor – 8-Bit CMOS Microcontrollers

BASIC TIMER and TIMER 0
S3P80C5/C80C5/C80C8
Pulse Width Modulation Mode
Pulse width modulation (PWM) mode lets you program the width (duration) of the pulse that is output at the
T0PWM pin. As in interval timer mode, a match signal is generated when the counter value is identical to the
value written to the timer 0 data register. In PWM mode, however, the match signal does not clear the counter.
Instead, it runs continuously, overflowing at ‘FFH’, and then continues incrementing from ‘00H’.
Although you can use the match signal to generate a timer 0 overflow interrupt, interrupts are not typically used
in PWM-type applications. Instead, the pulse at the T0PWM pin is held to Low level as long as the reference
data value is less than or equal to ( ≤ ) the counter value and then the pulse is held to High level for as long as
the data value is greater than ( > ) the counter value. One pulse width is equal to t_CLK × 256 (see Figure 11-4).
IRQ0(T0INT)
Interrupt
Enable/Disable
(T0CON.1)
PND (T0CON.0)
CLK
Counter
IRQ0 (T0OVF)
Comparator
Buffer Register
Data Register
Match
CTL
T0CON.5
T0CON.4
Match Signal
T0CON.3
T0OVF
P2.0/
T0PWM
High level when
data > counter;
Low level when
data <_ counter
NOTE: Interrupts are usually not used when timer 0 is configurared to operate in PWM mode
Figure 10-4. Simplified Timer 0 Function Diagram: PWM Mode
10-6