S6C0676 Datasheet, PDF (7/19 Pages) Samsung semiconductor – 6 BIT 480 CHANNEL TFT-LCD SOURCE DRIVER

6 BIT 480 CHANNEL TFT-LCD SOURCE DRIVER
S6C0676
PIN DESCRIPTIONS
Symbol
Pin Name
Description
VDD1
Logic power supply 2.7 - 3.6 V
VDD2
Driver power supply 5.0 - 8.0 V
VSS1
Logic ground
Ground (0 V)
VSS2
Driver ground
Ground (0 V)
Y1 to Y480
Driver outputs
The D/A converted 64 gray-scale analog voltage is output.
D0<0:5>
- D5<0:5>
Display data input
The display data is input with a width of 36 bits,
gray-scale data (6 bits) by 6 dots (R,G,B) DX0: LSB, DX5: MSB
This pin controls the direction of shift register in cascade connection.
SHL
Shift direction control The shift direction of the shift registers is as follows.
input
SHL = H: DIO1 input, Y1 → Y480, DIO2 output
SHL = L: DIO2 input, Y480 → Y1, DIO1 output
DIO1
Start pulse input / output
SHL = H: Used as the start pulse input pin.
SHL = L: Used as the start pulse output pin.
DIO2
Start pulse input / output
SHL = H: Used as the start pulse output pin.
SHL = L: Used as the start pulse input pin.
DATPOL1
DATPOL2
Data inversion input
DATPOL1, 2 = L: Display data is not inverted
DATPOL1 = H: Display data of D0<0:5> - D2<0:5> is inverted
DATPOL2 = H: Display data of D3<0:5> - D5<0:5> is inverted
POL
Polarity input
POL = H: The reference voltage for odd number outputs are VGMA1 –
VGMA5 and those for even number outputs are VGMA6 – VGMA10.
POL = L: The reference voltage for odd number outputs are VGMA6 –
VGMA10 and those for even number outputs are VGMA1 – VGMA5.
CLK2
Shift clock input
Refer to the shift register's shift clock input. The display data is loaded
to the data register at the rising edge of CLK2.
CLK1
Latch input
Latches the contents of the data register at rising edge and transfers
them to the D/A converter. Also, after CLK1 input, clears the internal
shift register contents. After 1 pulse input on start, operates normally.
CLK1 input timing refers to the "Relationships between CLK1 start
pulse (DIO1, DIO2) and blanking period" of the switching characteristic
waveform. Outputs the G/S data at falling edge.
VGMA1
–
VGMA10
Input the gamma corrected power supplies from external source.
Gamma corrected power VDD2 > VGMA1 > VGMA2 > ……… > VGMA9 > VGMA10 > VSS2
supplies
Keep gray-scale power supply unchanged during the gray-scale
voltage output.
RPI1, RPO1
RPI2, RPO2
Line-repair AMP input /
output
The Structure of the line-repair amp is the same as that of the analog
output.
RPI1 (RPI2) → impedance changed → RPO1 (RPO2)
TEST
Test input
TEST = L: Normal operation mode
TEST = H: Test mode (OP AMP CUT-OFF, Rpd = 15 kΩ)
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