S6C0676 Datasheet, PDF (16/19 Pages) Samsung semiconductor – 6 BIT 480 CHANNEL TFT-LCD SOURCE DRIVER

S6C0676
6 BIT 480 CHANNEL TFT-LCD SOURCE DRIVER
DC CHARACTERISTICS
Table 5 . DC Characteristics (Ta = -20 to 75 °C, VDD1 = 2.7 to 3.6 V, VDD2 = 5.0 to 8.0 V, VSS1 = VSS2 = 0 V)
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
High level input voltage VIH _{SHL, CLK2, D00 - D55, CLK1,} 0.8VDD1
-
VDD1
V
Low level input voltage VIL
POL, DATPOL1, DATPOL2,
0
-
0.2VDD1
Input leakage current
IL
DIO1 (DIO2)
-1
-
1
µA
High level output
voltage
Low level output
voltage
VOH
DIO1 (DIO2), IO = -1.0 mA VDD1-0.5
-
VOL
DIO1 (DIO2), IO = +1.0 mA
-
-
-
V
0.5
Resistor
R0 - R62
Refer to Table 1. Resistor
Strings
Rn × 0.7
-
Rn × 1.3 Ω
Driver output current
IVOH1
IVOL1
VDD2 = 8.0 V,
Vx = 2.5 V, Vyo = 7.5 V
VDD2 = 8.0 V,
Vx = 5.5 V, Vyo = 0.5 V
-
-1.0
-0.5
mA
0.5
1.0
-
mA
Line-repair Driver
output current
IVOH2
IVOL2
VDD2 = 8.0 V,
Vx = 2.5 V, Vyo = 7.5 V
VDD2 = 8.0 V,
Vx = 5.5 V, Vyo = 0.5 V
-
-3.0
-1.5
mA
1.5
3.0
-
mA
Output voltage
deviation
∆VO
VSS2 + 0.1 V ~ VDD2 - 1.5 V
VDD2 – 1.49 V ~ VDD2 – 0.1 V
-
-
±10
±20
mV
±15
±25
VSS2 + 1.5 V ~ VDD2 - 1.5 V
-
±5
±15
Output RMS voltage
deviation
dVrms⁽²⁾ _{VSS2 + 0.1 V ~ VSS2 + 1.49 V}
VDD2 – 1.49 V ~ VDD2 – 0.1 V
-
mV
±15
±35
Output voltage range
Vyo
Input data : 00H to 3FH
VSS2 + 0.1
VDD2 - 0.1 V
Logic part dynamic
current
IDD1
VDD1 = 3.0 V ⁽³⁾
-
5.0
6.5
VDD1 = 3.0 V, VDD2 = 8.0 V,
Driver part dynamic
current
IDD2
VGMA1 = 7.5 V,
VGMA5 = 4.5 V,
VGMA6 = 3.5 V,
-
VGMA10 = 0.5 V ^{(3) (4)}
mA
5.0
7.0
NOTES:
1. Vyo is the output voltage of analog output pins Y1 to Y480. Vx is the voltage applied to analog output pins Y1 to Y480.
2. dVrms is a maximum deviation value from ideal difference between high output and low output at the same gray scale.
3. CLK1 period is defined to be 15.6 µs at fCLK2 = 54 MHz, data pattern = 10101010 (checkerboard pattern), Ta = 25 °C
4. The current consumption per driver when SXGA single-sided mounting (8 drivers) is connected in cascade
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