K4S56163PF Datasheet, PDF (7/12 Pages) Samsung semiconductor – 4M x 16Bit x 4 Banks Mobile SDRAM in 54FBGA

K4S56163PF - R(B)G/F
Mobile-SDRAM
OPERATING AC PARAMETER
(AC operating conditions unless otherwise noted)
Parameter
Symbol
Row active to row active delay
RAS to CAS delay
Row precharge time
Row active time
Row cycle time
Last data in to row precharge
Last data in to Active delay
Last data in to new col. address delay
Last data in to burst stop
Auto refresh cycle time
Exit self refresh to active command
Col. address to col. address delay
Number of valid output data
Number of valid output data
Number of valid output data
tRRD(min)
tRCD(min)
tRP(min)
tRAS(min)
tRAS(max)
tRC(min)
tRDL(min)
tDAL(min)
tCDL(min)
tBDL(min)
tARFC(min)
tSRFX(min)
tCCD(min)
CAS latency=3
CAS latency=2
CAS latency=1
Version
-75
-90
-1L
15
18
18
22.5
24
27
22.5
24
27
50
50
50
100
72.5
74
77
15
tRDL + tRP
1
1
80
120
1
2
1
-
0
Unit
Note
ns
1
ns
1
ns
1
ns
1
us
ns
1
ns
2
-
CLK
2
CLK
2
ns
ns
CLK
3
ea
4
NOTES:
1. The minimum number of clock cycles is determined by dividing the minimum time required with clock cycle time and then rounding off to the next
higher integer.
2. Minimum delay is required to complete write.
3. All parts allow every cycle column address change.
4. In case of row precharge interrupt, auto precharge and read burst stop.
7
September 2004