K6R1016C1C Datasheet, PDF (5/11 Pages) Samsung semiconductor – 64Kx16 Bit High-Speed CMOS Static RAM(5.0V Operating).

K6R1016C1C-C/C-L, K6R1016C1C-I/C-P
READ CYCLE*
Parameter
Symbol
Read Cycle Time
tRC
Address Access Time
tAA
Chip Select to Output
tCO
Output Enable to Valid Output
tOE
UB, LB Access Time
tBA
Chip Enable to Low-Z Output
tLZ
UB, LB Enable to Low-Z Output
tBLZ
Output Enable to Low-Z Output
tOLZ
Chip Disable to High-Z Output
tHZ
Output Disable to High-Z Output
tOHZ
UB, LB Disable to High-Z Output
tBHZ
Output Hold from Address Change
tOH
Chip Selection to Power Up Time
tPU
Chip Selection to Power DownTime
tPD
K6R1016C1C-10
Min
Max
10
-
-
10
-
10
-
5
-
5
3
-
0
-
0
-
0
5
0
5
0
5
3
-
0
-
-
10
* The above parameters are also guaranteed at industrial temperature range.
K6R1016C1C-12
Min
Max
12
-
-
12
-
12
-
6
-
6
3
-
0
-
0
-
0
6
0
6
0
6
3
-
0
-
-
12
CMOS SRAM
K6R1016C1C-15
Unit
Min
Max
15
-
ns
-
15
ns
-
15
ns
-
7
ns
-
7
ns
3
-
ns
0
-
ns
0
-
ns
-
7
ns
-
7
ns
-
7
ns
3
-
ns
0
-
ns
-
15
ns
WRITE CYCLE*
Parameter
Symbol
K6R1016C10-12
Min
Max
Write Cycle Time
tWC
10
-
Chip Select to End of Write
tCW
7
-
Address Set-up Time
tAS
0
-
Address Valid to End of Write
tAW
7
-
Write Pulse Width(OE High)
tWP
7
-
Write Pulse Width(OE Low)
tWP1
10
-
UB, LB Valid to End of Write
tBW
7
-
Write Recovery Time
tWR
0
-
Write to Output High-Z
tWHZ
0
5
Data to Write Time Overlap
tDW
5
-
Data Hold from Write Time
tDH
0
-
End Write to Output Low-Z
tOW
3
-
* The above parameters are also guaranteed at industrial temperature range.
K6R1016C1C-12
Min
Max
12
-
8
-
0
-
8
-
8
-
12
-
8
-
0
-
0
6
6
-
0
-
3
-
K6R1016C1C-15
Unit
Min
Max
15
-
ns
9
-
ns
0
-
ns
9
-
ns
9
-
ns
15
-
ns
9
-
ns
0
-
ns
0
7
ns
7
-
ns
0
-
ns
3
-
ns
TIMING DIAGRAMS
TIMING WAVEFORM OF READ CYCLE(1) (Address Controlled, CS=OE=VIL, WE=VIH, UB, LB=VIL
Address
Data Out
tRC
tAA
tOH
Previous Valid Data
Valid Data
-5-
Revision 4.0
September 2001