K4M51163LC Datasheet, PDF (5/12 Pages) Samsung semiconductor – 8M x 16Bit x 4 Banks Mobile SDRAM in 54FBGA

K4M51163LC - R(B)N/G/L/F
Mobile SDRAM
DC CHARACTERISTICS
Recommended operating conditions (Voltage referenced to VSS = 0V, TA = -25 to 85°C for Extended, -25 to 70°C for Commercial)
Parameter
Symbol
Test Condition
Version
-75 -1H -1L
Unit Note
Operating Current
(One Bank Active)
Burst length = 1
ICC1 tRC ≥ tRC(min)
IO = 0 mA
110 110 110 mA 1
Precharge Standby Current in ^{ICC2P CKE ≤ VIL(max), tCC = 10ns}
power-down mode
ICC2PS CKE & CLK ≤ VIL(max), tCC = ∞
1.0
mA
1.0
Precharge Standby Current
ICC2N
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns
Input signals are changed one time during 20ns
15
in non power-down mode
ICC2NS
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
5
mA
Active Standby Current
in power-down mode
ICC3P CKE ≤ VIL(max), tCC = 10ns
ICC3PS CKE & CLK ≤ VIL(max), tCC = ∞
8
mA
8
Active Standby Current
ICC3N
CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns
Input signals are changed one time during 20ns
30
mA
in non power-down mode
(One Bank Active)
ICC3NS
CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞
Input signals are stable
20
mA
Operating Current
(Burst Mode)
ICC4
IO = 0 mA
Page burst
4Banks Activated
tCCD = 2CLKs
115
95
95 mA 1
Refresh Current
Self Refresh Current
ICC5 tRC ≥ tRC(min)
ICC6 CKE ≤ 0.2V
180 180 180 mA 2
-N/L
800
uA
-G/F
Internal TCSR
Full Array
1/2 of Full Array
45 ^*4
500
450
85/70
800
700
°C 3
uA
1/4 of Full Array
425
625
NOTES:
1. Measured with outputs open.
2. Refresh period is 64ms.
3. Internal TCSR can be supported.
In commercial Temp : 45°C/70°C, In extended Temp : 45°C/85°C
4. It has +/-5 °C tolerance.
5. Unless otherwise noted, input swing IeveI is CMOS(VIH /VIL=VDDQ/VSSQ).
5
March 2006