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DDRSDRAM Datasheet, PDF (49/49 Pages) Samsung semiconductor – DDR SDRAM Specification Version 0.61
128Mb DDR SDRAM
Target
QFC timming on Write operation with tDQSSmax
QFC on writes is enabled as soon as possible after the clock edge of write command and disabled as soon
as possible after the last DQS-in low going edge.
BL = 2
0
1
2
3
4
5
6
7
8
CK
CK
Command
DQS@tDQSSmax
Write
DQS’ @tDQSSmax
QFC
Hi-Z tQCSW
Dout 0 Dout 1
tQCHW
Figure 27. : QFC timing on write operation with tDQSSmax
QFC Timming on Write operation with tDQSSmin
QFC on writes is enabled as soon as possible after the clock edge of write command and disabled
as soon as possible after the last DQS-in low going edge.
BL = 2
CK
0
1
2
3
4
5
6
7
8
CK
Command
DQS@tDQSSmin
Write
DQS’ @tDQSSmin
QFC
Dout 0 Dout 1
Hi-Z tQCSW
tQCHW
Figure 28. : QFC timing on write operation with tDQSSmax
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REV. 0.61 August 9. '99