K9F1208R0B Datasheet, PDF (35/45 Pages) Samsung semiconductor – 64M x 8 Bit NAND Flash Memory

K9F1208R0B
K9F1208B0B
K9F1208U0B
Preliminary
FLASH MEMORY
BLOCK ERASE
The Erase operation is done on a block(16K Byte) basis. Block address loading is accomplished in three cycles initiated by an Erase
Setup command(60h). Only address A14 to A25 is valid while A9 to A13 is ignored. The Erase Confirm command(D0h) following the
block address loading initiates the internal erasing process. This two-step sequence of setup followed by execution command
ensures that memory contents are not accidentally erased due to external noise conditions.
At the rising edge of WE after the erase confirm command input, the internal write controller handles erase and erase-verify. When
the erase operation is completed, the Write Status Bit(I/O 0) may be checked. Figure 12 details the sequence.
Figure 12. Block Erase Operation
R/B
tBERS
I/OX
60h
Address Input(3Cycle)
D0h
Block Add. : A14 ~ A25
70h
I/O0
Pass
Fail
Multi-Plane Page Program
Multi-Plane Page Program is an extension of Page Program, which is executed for a single plane with 528 byte page registers. Since
the device is equipped with four memory planes, activating the four sets of 528 byte page registers enables a simultaneous program-
ming of four pages. Partial activation of four planes is also permitted.
After writing the first set of data up to 528 byte into the selected page register, Dummy Page Program command (11h) instead of
actual Page Program (10h) is inputted to finish data-loading of the current plane and move to the next plane. Since no programming
process is involved, R/B remains in Busy state for a short period of time(tDBSY). Read Status command (standard 70h or alternate
71h) may be issued to find out when the device returns to Ready state by polling the Ready/Busy status bit(I/O 6). Then the next set
of data for one of the other planes is inputted with the same command and address sequences. After inputting data for the last plane,
actual True Page Program (10h) instead of dummy Page Program command (11h) must be followed to start the programming pro-
cess. The operation of R/B and Read Status is the same as that of Page Program. Since maximum four pages are programmed
simultaneously, pass/fail status is available for each page when the program operation completes. The extended status bits (I/O1
through I/O 4) are checked by inputting the Read Multi-Plane Status Register. Status bit of I/O 0 is set to "1" when any of the pages
fails. Multi-Plane page Program with "01h" pointer is not supported, thus prohibited.
Figure 13. Four-Plane Page Program
tDBSY
R/B
tDBSY
tDBSY
tPROG
I/OX
80h
Address &
Data Input
11h
80h
Address &
Data Input
11h ^80h
Address &
Data Input
11h
80h
Address &
Data Input
10h
71h
A0 ~ A7 & A9 ~ A25
528 bytes
80h
11h 80h
11h ^80h
11h 80h
10h
Data
Input
Plane 0
(1024 Block)
Block 0
Block 4
Plane 1
(1024 Block)
Block 1
Block 5
Plane 2
(1024 Block)
Block 2
Block 6
Plane 3
(1024 Block)
Block 3
Block 7
Block 4088
Block 4092
Block 4089
Block 4093
Block 4090
Block 4094
Block 4091
Block 4095
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