KS0074 Datasheet, PDF (33/70 Pages) Samsung semiconductor – 34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD

KS0074
34COM/80SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
14) Read Busy Flag & Address

        


$% # # # # # #
#
This instruction shows whether KS0074 is in internal operation or not. If the resultant BF is High, the internal
operation is in progress and should wait until BF to be Low, which by then the next instruction can be performed.
In this instruction value of address counter can also be read.
15) Write data to RAM

        


       

Write binary 8-bit data to DDRAM/CGRAM/SEGRAM.
The selection of RAM from DDRAM, CGRAM, or SEGRAM, is set by the previous address set instruction : DDRAM address
set, CGRAM address set, SEGRAM address set. RAM set instruction can also determines the AC direction to RAM.
After write operation, the address is automatically increased/decreased by 1, according to the entry mode.
16) Read data from RAM

        



      

Read binary 8-bit data from DDRAM/CGRAM/SEGRAM.
The selection of RAM is set by the previous address set instruction. If address set instruction
of RAM is not performed before this instruction, the data that read first is invalid, as the
direction of AC is not determined. If RAM data is read several times without RAM address
set instruction before read operation, the correct RAM data can be obtained from
the second, but the first data would be incorrect, as there is no time margin to transfer
RAM data. In DDRAM read operation, cursor shift instruction plays the same role as
DDRAM address set instruction : it also transfer RAM data to output data register.
After read operation address counter is automatically increased/decreased by 1 according
to the entry mode. After CGRAM/SEGRAM read operation, display shift may not be executed correctly.
* In case of RAM write operation, AC is increased/decreased by 1 as in read operation after this.
In this time, AC indicates the next address position, but the previous data can only be read by read instruction.