K4S643232H Datasheet, PDF (3/12 Pages) Samsung semiconductor – 64Mb H-die (x32) SDRAM Specification

SDRAM 64Mb H-die (x32)
512K x 32Bit x 4 Banks SDRAM
FEATURES
• JEDEC standard 3.3V power supply
• LVTTL compatible with multiplexed address
• Four banks operation
• MRS cycle with address key programs
-. CAS latency (2 & 3)
-. Burst length (1, 2, 4, 8 & Full page)
-. Burst type (Sequential & Interleave)
• All inputs are sampled at the positive going edge of the system clock.
• Burst read single-bit write operation
• DQM for masking
• Auto & self refresh
• 64ms refresh period(4K Cycle)
CMOS SDRAM
GENERAL DESCRIPTION
The K4S643232H is 67,108,864 bits synchronous high data rate Dynamic RAM organized as 4 x 524,288 words by 32 bits, fabricated
with SAMSUNG′s high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock.
I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable
latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.
Ordering Information
Part No.
K4S643232H-TC/L70
K4S643232H-TC/L60
K4S643232H-TC/L55
K4S643232H-TC/L50
Orgainization
2Mb x 32
Max Freq.
143MHz(CL=3)
166MHz(CL=3)
183MHz(CL=3)
200MHz(CL=3)
Interface
LVTTL
Package
86pin TSOP(II)
Organization
2Mx32
Row Address
A0~A10
Column Address
A0-A7
Row & Column address configuration
-3-
Rev. 1.4 August 2004