KM4132G271A Datasheet, PDF (25/48 Pages) Samsung semiconductor – 128K x 32Bit x 2 Banks Synchronous Graphic RAM

KM4132G271A
14. Mask Functions
CMOS SGRAM
1) Normal Write
I/O masking : By Mask at Write Per Bit Mode, the selected bit planes keep the original data.
If bit plane 0, 3, 7, 9, 15, 22, 24, and 31 keep the original value.
i) STEP
¨ç SMRS(LMR) :Load mask[31-0]="0111, 1110, 1011, 0111, 1111, 1101, 0111, 0110"
¨è Row Active with DSF "H" :Write Per Bit Mode Enable
¨é Perform Normal Write.
i) ILLUSTRATION
I/O(=DQ)
External Data-in
DQMi
Mask Register
Before Write
After Write
31
24
11111111
DQM3=0
01111110
00000000
01111110
23
16
11111111
DQM2=0
10110110
00000000
10110110
15
8
00000000
DQM1=0
11111101
11111111
00000010
7
0
00000000
DQM0=1
01110110
11111111
11111111
Note 1
2) Block Write
Pixel masking : By Pixel Data issued through DQ pin, the selected pixels keep the original data.
See PIXEL TO DQ MAPPING TABLE.
If Pixel 0, 4, 9, 13, 18, 22, 27 and 31 keep the original white color.
Assume 8bpp,
White = "0000,0000", Red="1010,0011", Green = "1110,0001", Yellow = "0000,1111", Blue = "1100,0011"
i) STEP
¨ç SMRS(LCR) :Load color(for 8bpp, through x32 DQ color0-3 are loaded into color registers)
Load(color3, color2, color1, color0) = (Blue, Green, Yellow, Red)
= "1100,0011, 1110, 0001, 0000, 1111, 1010, 0011"
¨è Row Active with DSF "L" : I/O Mask by Write Per Bit Mode Disable
¨é Block write with DQ[31-0] = "0111, 0111, 1011, 1011, 1101, 1101, 1110, 1110"
i) ILLUSTRATION
I/O(=DQ)
DQMi
Color Register
000
Before
001
Block
010
Write
&
011
DQ
100
(Pixel
101
data)
110
111
000
001
010
After
Block
011
Write
100
101
110
111
Note 2
31
24
DQM3=0
Color3=Blue
White DQ24=H
White DQ25=H
White DQ26=H
White DQ27=L
White DQ28=H
White DQ29=H
White DQ30=H
White DQ31=L
Blue
Blue
Blue
White
Blue
Blue
Blue
White
23
16
DQM2=0
Color2=Green
White DQ16=H
White DQ17=H
White DQ18=L
White DQ19=H
White DQ20=H
White DQ21=H
White DQ22=L
White DQ23=H
Green
Green
White
Green
Green
Green
White
Green
15
8
DQM1=0
Color1=Yellow
White DQ8=H
White DQ9=L
White DQ10=H
White DQ11=H
White DQ12=H
White DQ13=L
White DQ14=H
White DQ15=H
Yellow
White
Yellow
Yellow
Yellow
White
Yellow
Yellow
7
0
DQM0=1
Color0=Red
White DQ0=L
White DQ1=H
White DQ2=H
White DQ3=H
White DQ4=L
White DQ5=H
White DQ6=H
White DQ7=H
White
White
White
White
White
White
White
White
*Note : 1. DQM byte masking.
2. At normal write, ONE column is selected among columns decorded by A 2-0(000-111).
At block write, instead of ignored address A 2-0, DQ0-31 control each pixel.
Rev.0 (August 1997)