KM4132G271A Datasheet, PDF (1/48 Pages) Samsung semiconductor – 128K x 32Bit x 2 Banks Synchronous Graphic RAM

KM4132G271A
CMOS SGRAM
128K x 32Bit x 2 Banks Synchronous Graphic RAM
FEATURES
¡Ü JEDEC standard 3.3V power supply
¡Ü LVTTL compatible with multiplexed address
¡Ü Dual bank / Pulse RAS
¡Ü MRS cycle with address key programs
-. CAS Latency (2, 3)
-. Burst Length (1, 2, 4, 8 & full page)
-. Burst Type (Sequential & Interleave)
¡Ü All inputs are sampled at the positive going edge of the
system clock
¡Ü Burst Read Single-bit Write operation
¡Ü DQM 0-3 for byte masking
¡Ü Auto & self refresh
¡Ü 16ms refresh period (1K cycle)
¡Ü 100 Pin QFP
Graphics Features
¡Ü SMRS cycle.
-. Load mask register
-. Load color register
¡Ü Write Per Bit(Old Mask)
¡Ü Block Write(8 Columns)
GENERAL DESCRIPTION
The KM4132G271A is 8,388,608 bits synchronous high data
rate Dynamic RAM organized as 2 x 131,072 words by 32 bits,
fabricated with SAMSUNG's high performance CMOS technol-
ogy. Synchronous design allows precise cycle control with the
use of system clock. I/O transactions are possible on every
clock cycle. Range of operating frequencies, programmable
burst length, and programmable latencies allows the same
device to be useful for a variety of high bandwidth, high perfor-
mance memory system applications.
Write per bit and 8 columns block write improves performance in
graphics systems.
ORDERING INFORMATION
Part NO.
KM4132G271A-8
KM4132G271A-10
KM4132G271A-12
Cycle
time
8ns
10ns
12ns
Clock
f
125MHz
100MHz
83MHz
Access
time@CL=3
7.0ns
7.0ns
9.0ns
FUNCTIONAL BLOCK DIAGRAM
CLK
CKE
CS
DQMi
BLOCK
WRITE
CONTROL
LOGIC
COLUMN
MASK
WRITE
CONTROL
LOGIC
MUX
MASK
REGISTER
COLOR
REGISTER
DQMi
RAS
CAS
WE
128Kx32
CELL
ARRAY
128Kx32
CELL
ARRAY
DSF
DQMi
SERIAL
COUNTER
COLUMN ADDRESS
BUFFER
ROW DECORDER
BANK SELECTION
ROW ADDRESS
BUFFER
REFRESH
COUNTER
ADDRESS REGISTER
CLOCK ADDRESS(A0~A9)
DQi
(i=0~31)
Rev.0 (August 1997)