K4S511633C Datasheet, PDF (2/8 Pages) Samsung semiconductor – 32Mx16 Mobile SDRAM 54CSP 1/CS

K4S511633C-YL/N/P
8M x 16Bit x 4 Banks Mobile SDRAM
CMOS SDRAM
FEATURES
• 3.0V power supply
• LVCMOS compatible with multiplexed address
• Four banks operation
• MRS cycle with address key programs
-. CAS latency (1 & 2 & 3)
-. Burst length (1, 2, 4, 8 & Full page)
-. Burst type (Sequential & Interleave)
• All inputs are sampled at the positive going edge of the system
clock.
• Burst read single-bit write operation
• DQM for masking
• Auto & self refresh
• 64ms refresh period (8K cycle)
• 1 /CS Support.
• Commercial Temperature Operation (-25°C ~ 70 °C).
Extended Temperature Operation (-25°C ~ 85°C).
Industrial Temperature Operation (-40°C ~ 85°C).
• 54balls DDP CSP
FUNCTIONAL BLOCK DIAGRAM
GENERAL DESCRIPTION
The K4S511633C is 536,870,912 bits synchronous high data
rate Dynamic RAM organized as 4 x 8,388,608 words by 16bits,
fabricated with SAMSUNG's high performance CMOS technology.
Synchronous design allows precise cycle control with the use of
system clock I/O transactions are possible on every clock cycle.
Range of operating frequencies, programmable burst length and
programmable latencies allow the same device to be useful for a
variety of high bandwidth, high performance memory system
applications.
ORDERING INFORMATION
Part No.
Max Freq.
Interface Package
K4S511633C-YL/N80
K4S511633C-YL/N1H
K4S511633C-YL/N1L
125MHz(CL=3)
100MHz(CL=2)
100MHz(CL=2)
100MHz(CL=3)^*1
LVCMOS
54 CSP
- YN : Low Power, Operating Temp : -25°C ~ 85 °C.
- YL : Low Power, Operating Temp : -25°C ~ 70 °C.
- YP : Low Power, Operating Temp : -40 °C ~ 85 °C.
Note :
1. In case of 33MHz Frequency, CL1 can be supported.
CLK
ADD
Bank Select
Data Input Register
8M x 16
8M x 16
8M x 16
8M x 16
Column Decoder
LWE
LDQM
DQi
LCKE
LRAS
LCBR
LWE
LCAS
Latency & Burst Length
Programming Register
LWCBR
LDQM
Timing Register
CLK
CKE
CS
RAS
CAS
WE
DQM
* ^{Samsung Electronics reserves the right to}
change products or specification without
notice.
Rev. 1.2 Dec. 2002