S6A0032 Datasheet, PDF (18/39 Pages) Samsung semiconductor – 16 COM / 80 SEG DRIVER & CONTROLLER FOR STN LCD

S6A0032 PRELIMINARY SPEC. VER. 0.5
16 COM / 80 SEG DRIVER & CONTROLLER FOR STN LCD
INSTRUCTION DESCRIPTION
Table 9. Instruction Table
Instruction RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
Description
*Clear display
0
0
0
0
0
0
0
0
0
Write "20H" to DDRAM and set DDRAM
1 _{address to "00H" from AC}
Return home
DDRAM address is set to 00h from AC and
0 0 0 0 0 0 0 0 1 - the cursor returns to 00h position. The
contents of DDRAM are not changed.
Entry mode set
0
0
0
0
0
0
0
1
I/D
SH
Assign cursor moving direction and enable
the shift of entire display
Display ON / OFF
control
0
Cursor or display
shift
0
Function set 0
CGRAM
address set
0
DDRAM
address set
0
Read busy flag
and address
0
Write data
1
Read data
1
Set display (D), cursor (C), and blinking of
0 0 0 0 0 1 D C B _{cursor (B) ON / OFF control}
0 0 0 0 1 S/C R/L -
Set cursor moving and display shift control
- bit, and the direction, without changing of
DDRAM data
0 0 0 1 DL -
-
-
-
Set interface data length (DL: 4-bit / 8-bit)
instruction
0 0 1 0 0 A3 A2 A1 A0 Set CGRAM address in address counter.
0 1 A6 A5 A4 A3 A2 A1 A0 Set DDRAM address in address counter.
Whether in internal operation or not can be
1 BF A6 A5 A4 A3 A2 A1 A0 known by reading BF, The contents of
address counter can also be read
0 D7 D6 D5 D4 D3 D2 D1 D0 Write data into DDRAM / CGRAM
1 D7 D6 D5 D4 D3 D2 D1 D0 Read data from DDRAM / CGRAM
("-": Dont’ care )
NOTES:
1. Instruction execution time depends on the internal process time of S6A0032, therefore it is necessary to provide a time larger
than one MPU interface cycle time (tc) between execution of two successive instructions.
2. "Clear Display" instruction has 850µs execution time (when fosc = 40.0kHz), so check the Busy flag or wait for more than
850µs after using "Clear Display" instruction.
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