English
Language : 

S5K433CA Datasheet, PDF (18/25 Pages) Samsung semiconductor – 1/4 Optical Size 640x480(VGA) 3.3V/2.8V VGA CMOS Image Sensor
S5K433CA, S5K433LA
1/4” VGA CMOS IMAGE SENSOR
RGRGRGRGRGRGRGRG
G BG BG BG BG BG BG BG B
RGRGRGRGRGRGRGRG
G BG BG BG BG BG BG BG B
RGRGRGRGRGRGRGRG
G BG BG BG BG BG BG BG B
RGRGRGRGRGRGRGRG
G BG BG BG BG BG BG BG B
RGRGRGRGRGRGRGRG
G BG BG BG BG BG BG BG B
RGRGRGRGRGRGRGRG
G BG BG BG BG BG BG BG B
RGRGRGRGRGRGRGRG
G BG BG BG BG BG BG BG B
RGRGRGRGRGRGRGRG
G BG BG BG BG BG BG BG B
subsr=01b, subsc=01b
RGRGRGRGRGRGRGRG
G BG BG BG BG BG BG BG B
RGRGRGRGRGRGRGRG
G BG BG BG BG BG BG BG B
RGRGRGRGRGRGRGRG
G BG BG BG BG BG BG BG B
RGRGRGRGRGRGRGRG
G BG BG BG BG BG BG BG B
RGRGRGRGRGRGRGRG
G BG BG BG BG BG BG BG B
RGRGRGRGRGRGRGRG
G BG BG BG BG BG BG BG B
RGRGRGRGRGRGRGRG
G BG BG BG BG BG BG BG B
RGRGRGRGRGRGRGRG
G BG BG BG BG BG BG BG B
subsr=00b, subsc=11b
Figure 5. Bayer Space Sub-Sampling Examples
1-6. Line Rate and Frame Rate Control (Virtual Frame)
The line rate and the frame rate can be changeable by varying the size of virtual frame. The virtual frame’s width
and depth are controlled by effective WOI and blank depths. The effective WOI is scaled by the sub-sampling
factors from WOI set by register values. For CDS and ADC function, the virtual column width must be larger than
(adcres+1)*256/(2^mcdiv)+200, where adcres is the ADC resolution control register value. The horizontal and
vertical blanking time (hblank, vblank) should be over 60 and 4, respectively. The resulting frame time and line
time which are inverse of frame rate and line rate are represented by following equations:
1 frame time = { wrd / (subsr+1) + vblank } * (1 line time)
1 line time = { wcw / (subsc+1) + hblank } * (DCLK period)
1-7. Continuous Frame Capture Mode(CFCM) Integration Time Control (Electronic Shutter Control)
In CFCM operation, the integration time is controlled by shutter operation. The shutter operation is done when
shutter control register (shutc) is set to “1”. In shutter operation, the integration time is determined by the Row
Step Integration Time Control Register(cintr) and Column Step Integration Time Control Register(cintc). The
resulting integration time is expressed as;
Integration Time = { TBD }
where cintr = 0 to {TBD}, cintc = 0 to {TBD}.
1-8. Single Frame Capture Mode(SFCM) Integration Time Control
To capture a still image, SFCM can be set by Single Frame Capture Enable Register(sfcen). There are two
types of integration mode are implemented. In the rolling shutter mode (sfcim=0), the integration time is controlled
by SFCM Integration Time Register (sint). The light integration period for each rows progresses with reading rows.
The integration time is expressed as :
Integration Time = sint * (1 line time)
18