S3P9228 Datasheet, PDF (171/462 Pages) Samsung semiconductor – 8-BIT CMOS MICROCONTROLLERS USERS MANUAL

S3C9228/P9228
I/O PORTS
PORT 3
Port 3 is an 2-bit I/O port with individually configurable pins. Port 3 pins are accessed directly by writing or
reading the port 3 data register, P3 at location E7H in page 0. P3.0-P3.1 can serve as inputs (with or without pull-
up, and high impedance input), as outputs (push-pull or open-drain) or you can be configured the following
functions.
— Low-nibble pins (P3.0-P3.1): SEG2-SEG3, INTP
Port 3 Control Register (P3CON)
Port 3 has a 8-bit control register: P3CON for P3.0-P3.1. A reset clears the P3CON register to "00H", configuring
pins to input mode. You use control register setting to select input or output mode (push-pull or open-drain).
Port 3 Pull-up Resistor Control Register (P3PUR)
Using the port 3 pull-up resistor control register, P3PUR (F6H, page 0), you can configure pull-up resistors to
individually port 3 pins.
Port 3 Interrupt Enable, Pending, and Edge Selection Registers(P3INT, INTPND2.5-.4, P3EDGE)
To process external interrupts at the port 3 pins, three additional control registers are provided: the port 3
interrupt enable register P3INT (F7H, page 0), the port 3 interrupt pending bits INTPND2.5-.4 (D7H, page 0), and
the port 3 interrupt edge selection register P3EDGE (F8H, page 0).
The port 3 interrupt pending register bits lets you check for interrupt pending conditions and clear the pending
condition when the interrupt service routine has been initiated. The application program detects interrupt requests
by polling the INTPND2.5-.4 register at regular intervals.
When the interrupt enable bit of any port 3 pin is "1", a rising or falling edge at that pin will generate an interrupt
request. The corresponding INTPND2 bit is then automatically set to "1" and the IRQ level goes low to signal the
CPU that an interrupt request is waiting. When the CPU acknowledges the interrupt request, application software
must the clear the pending condition by writing a "0" to the corresponding INTPND2 bit.
MSB .7
Port 3 Control Register (P3CON)
F5H, Page 0, R/W
.6 .5 .4 .3 .2 .1
.0 LSB
Not used
P3.1/SEG2 P3.0/SEG3
(INTP)
(INTP)
P3CON bit-pair pin configuration settings:
00 Schmitt trigger input mode
01 Push-pull output mode
10 N-channel open-drain output mode
11 Not available
Figure 9-14. Port 3 Control Register (P3CON)
9-11