S6B0108 Datasheet, PDF (17/23 Pages) Samsung semiconductor – 64 CH SEGMENT DRIVER FOR DOT MATRIX LCD

64CH SEGMENT DRIVER FOR DOT MATRIX LCD
S6B0108
Display ON / OFF Flip - Flop
The display on/off flip-flop makes on/off the liquid crystal display. When flip-flop is reset (logical low), selective
voltage or non selective voltage appears on segment output terminals. When flip-flop is set (logic high), non
selective voltage appears on segment output terminals regardless of display RAM data. The display on/off flip-
flop can changes status by instruction. The display data at all segment disappear while RSTB is low. The status
of the flip-flop is output to DB5 by status read instruction. The display on/off flip-flop synchronized by CL signal.
X Page Register
X page register designates pages of the internal display data RAM. Count function is not available. An address is
set by instruction.
Y Address Counter
Y address counter designates address of the internal display data RAM. An address is set by instruction and is
increased by 1 automatically by read or write operations of display data.
Display Data RAM
Display data RAM stores a display data for liquid crystal display. To indicate on state dot matrix of liquid crystal
display, write data 1. The other way, off state, writes 0.
Display data RAM address and segment output can be controlled by ADC signal.
• ADC = H → Y-address 0:S1 - Y address 63:S64
• ADC = L → Y-address 0:S64 - Y address 63:S1
ADC terminal connect the V_DD or V_SS.
Display Start Line Register
The display start line register indicates of display data RAM to display top line of liquid crystal display. Bit data
(DB<0:5>) of the display start line set instruction is latched in display start line register. Latched data is
transferred to the Z address counter while FRM is high, presetting the Z address counter. It is used for scrolling of
the liquid crystal display screen.
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