K4T51043Q Datasheet, PDF (16/28 Pages) Samsung semiconductor – 512Mb B-die DDR2 SDRAM

512Mb B-die DDR2 SDRAM
DDR2 SDRAM
For purposes of IDD testing, the following parameters are utilized
Parameter
CL(IDD)
DDR2-533
4-4-4
4
tRCD(IDD)
15
tRC(IDD)
60
tRRD(IDD)-x4/x8
7.5
tRRD(IDD)-x16
10
tCK(IDD)
3.75
tRASmin(IDD)
45
tRP(IDD)
15
tRFC(IDD)
105
Detailed IDD7
The detailed timings are shown below for IDD7.
Legend: A = Active; RA = Read with Autoprecharge; D = Deselect
DDR2-400
3-3-3
3
15
55
7.5
10
5
40
15
105
Units
tCK
ns
ns
ns
ns
ns
ns
ns
ns
IDD7: Operating Current: All Bank Interleave Read operation
All banks are being interleaved at minimum ^tRC(IDD) without violating ^tRRD(IDD) and ^tFAW(IDD) using a burst length of 4. Control and address bus
inputs are STABLE during DESELECTs. IOUT = 0mA
Timing Patterns for 4 bank devices x4/ x8/ x16
-DDR2-400 3/3/3
A0 RA0 A1 RA1 A2 RA2 A3 RA3 D D D
-DDR2-533 4/4/4
A0 RA0 D A1 RA1 D A2 RA2 D A3 RA3 D D D
Page 16 of 28
Rev. 1.5 July 2005