K4H560838E Datasheet, PDF (16/24 Pages) Samsung semiconductor – DDR SDRAM 256Mb E-die (x4, x8)

DDR SDRAM 256Mb E-die (x4, x8)
DDR SDRAM
Parameter
Mode register set cycle time
DQ & DM setup time to DQS
DQ & DM hold time to DQS
Control & Address input pulse width
DQ & DM input pulse width
Power down exit time
Exit self refresh to non-Read command
Exit self refresh to read command
Refresh interval time
Output DQS valid window
Clock half period
Data hold skew factor
DQS write postamble time
Active to Read with Auto precharge
command
Autoprecharge write recovery +
Precharge time
Symbol
B3
(DDR333@CL=2.5))
Min Max
AA
(DDR266@CL=2.0)
Min Max
A2
(DDR266@CL=2.0)
Min Max
B0
(DDR266@CL=2.5))
Min Max
tMRD
12
15
15
15
tDS
0.45
0.5
0.5
0.5
tDH
0.45
0.5
0.5
0.5
tIPW
2.2
2.2
2.2
2.2
tDIPW 1.75
1.75
1.75
1.75
tPDEX
6
7.5
7.5
7.5
tXSNR
75
75
75
75
tXSRD 200
200
200
200
tREFI
7.8
7.8
7.8
7.8
tQH
tHP
-tQHS
-
tHP
-tQHS
-
tHP
-tQHS
-
tHP
-tQHS
-
tHP
tCLmin
or tCHmin
-
tCLmin
or tCHmin
-
tCLmin
or tCHmin
-
tCLmin
or tCHmin
-
tQHS
0.55
0.75
0.75
0.75
tWPST
0.4
0.6
0.4
0.6
0.4
0.6
0.4
0.6
tRAP
18
20
20
20
tDAL
(tWR/tCK)
+
(tRP/tCK)
(tWR/tCK)
+
(tRP/tCK)
(tWR/tCK)
+
(tRP/tCK)
(tWR/tCK)
+
(tRP/tCK)
Unit Note
ns
ns j, k
ns _{j, k}
ns
8
ns 8
ns
ns
tCK
us 4
ns 11
ns 10, 11
ns 11
tCK 2
tCK 13
Rev. 1.3 April. 2005