S6C1108 Datasheet, PDF (15/20 Pages) Samsung semiconductor – 6 BIT 384 CHANNEL RSDS TFT-LCD SOURCE DRIVER

6 BIT 384 CHANNEL RSDS SOURCE DRIVER
S6C1108
5. CLK1 period = 20.68 µs raster cycle at fCLKP = 65 MHz, input data 00H fixed, alternating POL per raster cycle
and VGMA1 = VDD2-0.2V, VGMA14 = VSS2 + 0.2V fixed, Ta = 25 °C.
6. Yout load condition : 120pF(tester load). Refer to Figure 4.
7. Yout load condition : No load(Yout open). Refer to Figure 4.
VDD1
VDD2 _{IDD1 A}
IDD2 ^A
IDD3
DUT
VDD1
Y1
Y2
VDD2
VSS2
Y384
VSS1
120pF
DUT : Device Under Test
0V
Figure 4. Yout Load Condition(IDD2&3)
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