S5N8952X Datasheet, PDF (13/18 Pages) Samsung semiconductor – ADSL Transceiver for NIC

6. Functional Description
S5N8952X
ADSL Transceiver for NIC
The ADSL modem for customer premises consists of two main chips; ADSL transceiver
chip (S5N8952) and analog front-end chip (S5N8951). The analog front-end provides an
analog interface with line drivers and hybrid components for connecting to the PSTN. The
ADSL Transceiver provides all the digital functions as depicted in Figure 4.
DMT inherently transmits an optimized time-variable spectrum. This spectrum is adjusted
according to the desired data rate and the transmission characteristics (transfer function
and noise spectrum) on each and every subchannel. For this, CO and CPE transmit 256
4kHz-wide tone downstream and upstream respectively to each other during initialization.
They measure the quality of each of these received tones and then decide whether a tone
has sufficient quality to be used for further transmission and, if so, how much data this
tone should carry relative to the other tones that are used. They inform the bit loading
informations to each other.
In FDM-based DMT (Discrete MultiTone) modulation, the frequency band, 0 to 1.104MHz,
is divided into 256 equi-spaced subchannels with 4.3125KHz tone spacing. The frequency
band, 26KHz (#6) to 134KHz (#31) is used for the upstream, and 142KHz (#33) to
1.1MHz (#255) for the downstream.
The S5N8952 provides PCI bus interface for NIC application and 14-bit AD/DA interface.
SAR (Segmentation and Reassembly) and ATM TC (Transmission Convergence) are
implemented for ATM cell handling and especially on-chip hardware SAR provides more
processing power by reducing the PCI bus traffic than the software SAR. Reed-Solomon
error correction with/without interleaver and Trellis coded modulation increase channel
noise immunity. Time/frequency-domain equalizers, echo canceller, and digital filters, of
which coefficients are adaptively updated according to the channel conditions, enhance
the performance of data recovery.
PCI_BUS
SAR
PCI
ATM
TC
FRAMER/
RS CODEC
TCM/
VITERBI/
QAM CODEC
FFT/IFFT/
ROTER
TEQ/FEQ/
FILTER/
ECHO
ANALOG
FRONT_END
HOST
I/F
TEAKLITE
DSP
RAM ROM
Figure 4: Functional Block Diagram of the S5N8952X
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Preliminary Information (Rev.2.0)