K7Q163652A Datasheet, PDF (12/17 Pages) Samsung semiconductor – 512Kx36 & 1Mx18 QDRTM b2 SRAM

K7Q163652A
K7Q161852A
512Kx36 & 1Mx18 QDR^TM b2 SRAM
TIMING WAVE FORMS OF READ AND NOP
READ
READ
NOP
tKHKH
tKLKH
K
tKHKL
tKHKH
K
READ
tAVKH tKHAX
SA
A1
A2
A3
tIVKH tKHIX
R
tCHQX1
Q(Data Out)
tKHCH
Q1-1
Q1-2 Q2-1
tCHQX
Q2-2
Q3-1 Q3-2
C
tCHQV
tCHQZ
C
tCHQV
Don′t Care Undefined
Note: 1. Q1-1 refers to output from address A1+0, Q1-2 refers to output from address A1+1 i.e. the next internal burst address following A1+0.
2. Outputs are disabled(High-Z) one cycle after a NOP.
TIMING WAVE FORMS OF WRITE AND NOP
WRITE
WRITE NOP
tKHKH
tKLKH
K
tKHKL
tKHKH
K
tAVKH
SA
A1
A2
tIVKH tKHIX
W
tKHIX
D(Data In)
D1-1
D1-2 D2-1
D2-2
WRITE NOP
tKHAX
A3
D3-1
tDVKH
D3-2
tKHDX
- 12 -
July 2002
Rev 1.0