K9E2G08U0M Datasheet, PDF (11/38 Pages) Samsung semiconductor – 256M x 8 Bits NAND Flash Memory

K9E2G08U0M
Preliminary
FLASH MEMORY
AC Timing Characteristics for Command / Address / Data Input
CLE Set-up Time
CLE Hold Time
CE Setup Time
CE Hold Time
WE Pulse Width
ALE Setup Time
ALE Hold Time
Data Setup Time
Data Hold Time
Write Cycle Time
WE High Hold Time
Parameter
Symbol
tCLS
tCLH
tCS
tCH
tWP
tALS
tALH
tDS
tDH
tWC
tWH
Min
0
5
0
5
25 ⁽¹⁾
0
5
20
5
45
15
NOTE :
1. If tCS is set less than 10ns, tWP must be minimum 35ns, otherwise, tWP may be minimum 25ns.
Max
Unit
-
ns
-
ns
.-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
AC Characteristics for Operation
Parameter
Data Transfer from Cell to Register
ALE to RE Delay
CLE to RE Delay
Ready to RE Low
RE Pulse Width
WE High to Busy
Read Cycle Time
CE Access Time
RE Access Time
RE High to Output Hi-Z
CE High to Output Hi-Z
RE or CE High to Output hold
RE High Hold Time
Output Hi-Z to RE Low
WE High to RE Low
Device Resetting Time(Read/Program/Erase)
Last RE High to Busy(at sequential read)
CE High to Ready(in case of interception by CE at read)
CE High Hold Time(at the last serial read)⁽²⁾
Symbol
tR
tAR
tCLR
tRR
tRP
tWB
tRC
tCEA
tREA
tRHZ
tCHZ
tOH
tREH
tIR
tWHR
tRST
tRB
tCRY
tCEH
NOTE :
1. If reset command(FFh) is written at Ready state, the device goes into Busy for maximum 5us.
2. To break the sequential read cycle, CE must be held high for longer time than tCEH.
3. The time to Ready depends on the value of the pull-up resistor tied R/B pin.
Min
Max
Unit
-
15
µs
10
-
ns
10
-
ns
20
-
ns
25
-
ns
-
100
ns
50
-
ns
-
45
ns
-
30
ns
-
30
ns
-
20
ns
15
-
ns
15
-
ns
0
-
ns
60
-
ns
-
5/10/500⁽¹⁾
µs
-
100
ns
-
50 + tr(R/B)⁽³⁾
ns
100
-
ns
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