KFG5616Q1A-DEB6 Datasheet, PDF (106/113 Pages) Samsung semiconductor – OneNAND Specification FLASH MEMORY

OneNAND256(KFG5616x1A-xxB6)
Synchronous Mode Using the INT Pin
When operating synchronously, INT is tied directly to a Host GPIO.
Host
CE
AVD
CLK
RDY
OE
GPIO
OneNAND
CE
AVD
CLK
RDY
OE
INT
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Asynchronous Mode Using the INT Pin
When configured to operate in an asynchronous mode, CE and AVD of the OneNAND are tied to CE of the Host. CLK is tied to the
Host Vss (Ground). RDY is tied to a no-connect. OE of the OneNAND and Host are tied together and INT is tied to a GPIO.
Host
CE
Vss
N.C
OE
GPIO
OneNAND
CE
AVD
CLK
RDY
OE
INT
7.1.2 Polling the Interrupt Register Status Bit
An alternate method of determining the end of an operation is to continuously monitor the Interrupt Status Register Bit instead of
using the INT pin.
Command
INT
This can be configured in either a synchronous mode or an asynchronous mode.
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