K7I163682B Datasheet, PDF (10/17 Pages) Samsung semiconductor – 512Kx36-bit, 1Mx18-bit DDRII CIO b2 SRAM

K7I163682B
K7I161882B
512Kx36 & 1Mx18 DDRII CIO b2 SRAM
AC ELECTRICAL CHARACTERISTICS (VDD=1.8V ±0.1V, TA=0°C to +70°C)
PARAMETER
SYMBOL
MIN
MAX
Input High Voltage
VIH (AC)
VREF + 0.2
-
Input Low Voltage
VIL (AC)
-
VREF - 0.2
Notes: 1. This condition is for AC function test only, not for AC parameter test.
2. To maintain a valid level, the transitioning edge of the input must :
a) Sustain a constant slew rate from the current AC level through the target AC level, VIL(AC) or VIH(AC)
b) Reach at least the target AC level
c) After the AC target level is reached, continue to maintain at least the target DC level, VIL(DC) or VIH(DC)
Overershoot Timing
Undershoot Timing
UNIT
V
V
NOTES
1,2
1,2
20% tKHKH(MIN)
VIH
VDDQ+0.5V
VDDQ+0.25V
VDDQ
VSS
VSS-0.25V
VSS-0.5V
VIL
Note: For power-up, VIH ≤ VDDQ+0.3V and VDD ≤ 1.7V and VDDQ ≤ 1.4V t ≤ 200ms
OPERATING CONDITIONS (0°C ≤ TA ≤ 70°C)
PARAMETER
SYMBOL
MIN
Supply Voltage
VDD
1.7
VDDQ
1.4
Reference Voltage
VREF
0.68
Ground
VSS
0
20% tKHKH(MIN)
MAX
1.9
1.9
0.95
0
UNIT
V
V
V
V
AC TEST CONDITIONS
Parameter
Core Power Supply Voltage
Output Power Supply Voltage
Input High/Low Level
Input Reference Level
Input Rise/Fall Time
Output Timing Reference Level
Symbol
VDD
VDDQ
VIH/VIL
VREF
TR/TF
Value
1.7~1.9
1.4~1.9
1.25/0.25
0.75
0.3/0.3
VDDQ/2
Unit
V
V
V
V
ns
V
Note: Parameters are tested with RQ=250Ω
AC TEST OUTPUT LOAD
VREF ^0.75V
VDDQ/2
SRAM
50Ω
Zo=50Ω
250Ω
ZQ
- 10 -
July. 2004
Rev 3.1