STD12L01 Datasheet, PDF (1/7 Pages) SamHop Microelectronics Corp. – Super high dense cell design for low RDS(ON).

STD12L01 ^Gre
Pro
Sa mHop Microelectronics C orp.
N-Channel Logic Level Enhancement Mode Field Effect Transistor
Ver 1.3
PRODUCT SUMMARY
VDSS
ID
RDS(ON) (m ) Max
100V
12A
160 @ VGS=10V
FEATURES
Super high dense cell design for low RDS(ON).
Rugged and reliable.
TO-251 Package.
G
DS
STD SERIES
TO - 251( I ^- PAK ⁾
ABSOLUTE MAXIMUM RATINGS (TA=25^°C unless otherwise noted⁾
Symbol Parameter
V_DS
Drain-Source Voltage
V_GS
Gate-Source Voltage
I_D
Drain Current-Continuous ^a
TC=25°C
TC=70°C
I_DM
-Pulsed ^b
E_AS
Single Pulse Avalanche Energy ^d
P_D
Maximum Power Dissipation ^a
TC=25°C
TC=70°C
TJ, TSTG
Operating Junction and Storage
Temperature Range
THERMAL CHARACTERISTICS
R _JC
Thermal Resistance, Junction-to-Case ^a
R _JA
Thermal Resistance, Junction-to-Ambient ^a
Limit
100
±20
12
9.6
35
25
50
32
-55 to 150
2.5
50
Units
V
V
A
A
A
mJ
W
W
°C
°C/W
°C/W
Details are subject to change without notice.
1
Oct,29,2010
www.samhop.com.tw